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/* execute.c -- OR1K architecture dependent simulation
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/* execute.c -- OR1K architecture dependent simulation
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Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
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Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
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Copyright (C) 2005 György `nog' Jeney, nog@sdf.lonestar.org
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Copyright (C) 2005 György `nog' Jeney, nog@sdf.lonestar.org
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Copyright (C) 2008 Embecosm Limited
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Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
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This file is part of OpenRISC 1000 Architectural Simulator.
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This file is part of OpenRISC 1000 Architectural Simulator.
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This program is free software; you can redistribute it and/or modify
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This program is free software; you can redistribute it and/or modify it
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it under the terms of the GNU General Public License as published by
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under the terms of the GNU General Public License as published by the Free
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the Free Software Foundation; either version 2 of the License, or
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Software Foundation; either version 3 of the License, or (at your option)
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(at your option) any later version.
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any later version.
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This program is distributed in the hope that it will be useful,
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This program is distributed in the hope that it will be useful, but WITHOUT
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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GNU General Public License for more details.
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more details.
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You should have received a copy of the GNU General Public License
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You should have received a copy of the GNU General Public License along
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along with this program; if not, write to the Free Software
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with this program. If not, see <http://www.gnu.org/licenses/>. */
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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/* Most of the OR1K simulation is done in here.
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/* Most of the OR1K simulation is done in here.
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When SIMPLE_EXECUTION is defined below a file insnset.c is included!
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When SIMPLE_EXECUTION is defined below a file insnset.c is included!
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*/
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*/
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hist_exec_tail->next = hist_exec_head;
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hist_exec_tail->next = hist_exec_head;
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hist_exec_head->prev = hist_exec_tail;
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hist_exec_head->prev = hist_exec_tail;
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/* Cpu configuration */
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/* Cpu configuration */
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cpu_state.sprs[SPR_UPR] = config.cpu.upr;
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cpu_state.sprs[SPR_UPR] = config.cpu.upr;
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cpu_state.sprs[SPR_CPUCFGR] = config.cpu.cfgr; /* JPB */
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cpu_state.sprs[SPR_DCFGR] = config.debug.cfgr; /* JPB */
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cpu_state.sprs[SPR_VR] = config.cpu.rev & SPR_VR_REV;
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cpu_state.sprs[SPR_VR] = config.cpu.rev & SPR_VR_REV;
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cpu_state.sprs[SPR_VR] |= config.cpu.ver << 16;
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cpu_state.sprs[SPR_VR] |= config.cpu.ver << 16;
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cpu_state.sprs[SPR_SR] = config.cpu.sr;
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cpu_state.sprs[SPR_SR] = config.cpu.sr;
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pcnext = 0x0; /* MM1409: All programs should start at reset vector entry! */
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pcnext = 0x0; /* MM1409: All programs should start at reset vector entry! */
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