URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] [or1ksim/] [cpu/] [or32/] [insnset.c] - Diff between revs 1308 and 1319

Rev 1308	Rev 1319
Line 298...	Line 298...
`switch (k) {`	`switch (k) {`
`case NOP_NOP:`	`case NOP_NOP:`
`break;`	`break;`
`case NOP_EXIT:`	`case NOP_EXIT:`
`PRINTF("exit(%d)\n", evalsim_reg32 (3));`	`PRINTF("exit(%d)\n", evalsim_reg32 (3));`
	`PRINTF("reset : cycles %lld, insn #%lld\n", runtime.sim.reset_cycles, runtime.cpu.reset_instructions);`
	`PRINTF("current: cycles %lld, insn #%lld\n", runtime.sim.cycles, runtime.cpu.instructions);`
	`PRINTF("diff : cycles %lld, insn #%lld\n", runtime.sim.cycles - runtime.sim.reset_cycles, runtime.cpu.instructions - runtime.cpu.reset_instructions);`
`if (config.debug.gdb_enabled)`	`if (config.debug.gdb_enabled)`
`set_stall_state (1);`	`set_stall_state (1);`
`else`	`else`
`runtime.sim.cont_run = 0;`	`runtime.sim.cont_run = 0;`
`break;`	`break;`
	`case NOP_CNT_RESET:`
	`PRINTF("**************** counters reset ****************\n");`
	`PRINTF("cycles %lld, insn #%lld\n", runtime.sim.cycles, runtime.cpu.instructions);`
	`PRINTF("**************** counters reset ****************\n");`
	`runtime.sim.reset_cycles = runtime.sim.cycles;`
	`runtime.cpu.reset_instructions = runtime.cpu.instructions;`
	`break;`
`case NOP_PRINTF:`	`case NOP_PRINTF:`
`stackaddr = evalsim_reg32(4);`	`stackaddr = evalsim_reg32(4);`
`simprintf(stackaddr, evalsim_reg32(3));`	`simprintf(stackaddr, evalsim_reg32(3));`
`debug(5, "simprintf %x\n", stackaddr);`	`debug(5, "simprintf %x\n", stackaddr);`
`break;`	`break;`