| Line 17... |
Line 17... |
You should have received a copy of the GNU General Public License
|
You should have received a copy of the GNU General Public License
|
along with this program; if not, write to the Free Software
|
along with this program; if not, write to the Free Software
|
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
|
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
|
|
|
INSTRUCTION (l_add) {
|
INSTRUCTION (l_add) {
|
signed long temp1, temp2, temp3;
|
orreg_t temp1, temp2, temp3;
|
signed char temp4;
|
int8_t temp4;
|
|
|
temp2 = (signed long)PARAM2;
|
temp2 = (orreg_t)PARAM2;
|
temp3 = (signed long)PARAM1;
|
temp3 = (orreg_t)PARAM1;
|
temp1 = temp2 + temp3;
|
temp1 = temp2 + temp3;
|
SET_PARAM0(temp1);
|
SET_PARAM0(temp1);
|
set_ov_flag (temp1);
|
set_ov_flag (temp1);
|
if (ARITH_SET_FLAG) {
|
if (ARITH_SET_FLAG) {
|
flag = temp1 == 0;
|
flag = temp1 == 0;
|
setsprbits(SPR_SR, SPR_SR_F, flag);
|
setsprbits(SPR_SR, SPR_SR_F, flag);
|
}
|
}
|
if ((unsigned long) temp1 < (unsigned long) temp2)
|
if ((uorreg_t) temp1 < (uorreg_t) temp2)
|
setsprbits(SPR_SR, SPR_SR_CY, 1);
|
setsprbits(SPR_SR, SPR_SR_CY, 1);
|
else
|
else
|
setsprbits(SPR_SR, SPR_SR_CY, 0);
|
setsprbits(SPR_SR, SPR_SR_CY, 0);
|
|
|
temp4 = temp1;
|
temp4 = temp1;
|
if (temp4 == temp1)
|
if (temp4 == temp1)
|
or1k_mstats.byteadd++;
|
or1k_mstats.byteadd++;
|
}
|
}
|
INSTRUCTION (l_addc) {
|
INSTRUCTION (l_addc) {
|
signed long temp1, temp2, temp3;
|
orreg_t temp1, temp2, temp3;
|
signed char temp4;
|
int8_t temp4;
|
|
|
temp2 = (signed long)PARAM2;
|
temp2 = (orreg_t)PARAM2;
|
temp3 = (signed long)PARAM1;
|
temp3 = (orreg_t)PARAM1;
|
temp1 = temp2 + temp3 + getsprbits(SPR_SR, SPR_SR_CY);
|
temp1 = temp2 + temp3 + getsprbits(SPR_SR, SPR_SR_CY);
|
SET_PARAM0(temp1);
|
SET_PARAM0(temp1);
|
set_ov_flag (temp1);
|
set_ov_flag (temp1);
|
if (ARITH_SET_FLAG) {
|
if (ARITH_SET_FLAG) {
|
flag = temp1 == 0;
|
flag = temp1 == 0;
|
setsprbits(SPR_SR, SPR_SR_F, flag);
|
setsprbits(SPR_SR, SPR_SR_F, flag);
|
}
|
}
|
if ((unsigned long) temp1 < (unsigned long) temp2)
|
if ((uorreg_t) temp1 < (uorreg_t) temp2)
|
setsprbits(SPR_SR, SPR_SR_CY, 1);
|
setsprbits(SPR_SR, SPR_SR_CY, 1);
|
else
|
else
|
setsprbits(SPR_SR, SPR_SR_CY, 0);
|
setsprbits(SPR_SR, SPR_SR_CY, 0);
|
|
|
temp4 = temp1;
|
temp4 = temp1;
|
| Line 91... |
Line 91... |
runtime.sim.mem_cycles = old_cyc;
|
runtime.sim.mem_cycles = old_cyc;
|
sbuf_store (t - old_cyc);
|
sbuf_store (t - old_cyc);
|
}
|
}
|
}
|
}
|
INSTRUCTION (l_lwz) {
|
INSTRUCTION (l_lwz) {
|
unsigned long val;
|
uint32_t val;
|
if (config.cpu.sbuf_len) sbuf_load ();
|
if (config.cpu.sbuf_len) sbuf_load ();
|
val = eval_mem32(PARAM1, &breakpoint);
|
val = eval_mem32(PARAM1, &breakpoint);
|
/* If eval operand produced exception don't set anything */
|
/* If eval operand produced exception don't set anything */
|
if (!pending.valid)
|
if (!pending.valid)
|
SET_PARAM0(val);
|
SET_PARAM0(val);
|
}
|
}
|
INSTRUCTION (l_lbs) {
|
INSTRUCTION (l_lbs) {
|
signed char val;
|
int8_t val;
|
if (config.cpu.sbuf_len) sbuf_load ();
|
if (config.cpu.sbuf_len) sbuf_load ();
|
val = eval_mem8(PARAM1, &breakpoint);
|
val = eval_mem8(PARAM1, &breakpoint);
|
/* If eval opreand produced exception don't set anything */
|
/* If eval opreand produced exception don't set anything */
|
if (!pending.valid)
|
if (!pending.valid)
|
SET_PARAM0(val);
|
SET_PARAM0(val);
|
}
|
}
|
INSTRUCTION (l_lbz) {
|
INSTRUCTION (l_lbz) {
|
unsigned char val;
|
uint8_t val;
|
if (config.cpu.sbuf_len) sbuf_load ();
|
if (config.cpu.sbuf_len) sbuf_load ();
|
val = eval_mem8(PARAM1, &breakpoint);
|
val = eval_mem8(PARAM1, &breakpoint);
|
/* If eval opreand produced exception don't set anything */
|
/* If eval opreand produced exception don't set anything */
|
if (!pending.valid)
|
if (!pending.valid)
|
SET_PARAM0(val);
|
SET_PARAM0(val);
|
}
|
}
|
INSTRUCTION (l_lhs) {
|
INSTRUCTION (l_lhs) {
|
signed short val;
|
int16_t val;
|
if (config.cpu.sbuf_len) sbuf_load ();
|
if (config.cpu.sbuf_len) sbuf_load ();
|
val = eval_mem16(PARAM1, &breakpoint);
|
val = eval_mem16(PARAM1, &breakpoint);
|
/* If eval opreand produced exception don't set anything */
|
/* If eval opreand produced exception don't set anything */
|
if (!pending.valid)
|
if (!pending.valid)
|
SET_PARAM0(val);
|
SET_PARAM0(val);
|
}
|
}
|
INSTRUCTION (l_lhz) {
|
INSTRUCTION (l_lhz) {
|
unsigned short val;
|
uint16_t val;
|
if (config.cpu.sbuf_len) sbuf_load ();
|
if (config.cpu.sbuf_len) sbuf_load ();
|
val = eval_mem16(PARAM1, &breakpoint);
|
val = eval_mem16(PARAM1, &breakpoint);
|
/* If eval opreand produced exception don't set anything */
|
/* If eval opreand produced exception don't set anything */
|
if (!pending.valid)
|
if (!pending.valid)
|
SET_PARAM0(val);
|
SET_PARAM0(val);
|
}
|
}
|
INSTRUCTION (l_movhi) {
|
INSTRUCTION (l_movhi) {
|
SET_PARAM0(PARAM1 << 16);
|
SET_PARAM0(PARAM1 << 16);
|
}
|
}
|
INSTRUCTION (l_and) {
|
INSTRUCTION (l_and) {
|
unsigned long temp1;
|
uorreg_t temp1;
|
temp1 = PARAM1 & PARAM2;
|
temp1 = PARAM1 & PARAM2;
|
set_ov_flag (temp1);
|
set_ov_flag (temp1);
|
SET_PARAM0(temp1);
|
SET_PARAM0(temp1);
|
if (ARITH_SET_FLAG) {
|
if (ARITH_SET_FLAG) {
|
flag = temp1 == 0;
|
flag = temp1 == 0;
|
setsprbits(SPR_SR, SPR_SR_F, flag);
|
setsprbits(SPR_SR, SPR_SR_F, flag);
|
}
|
}
|
}
|
}
|
INSTRUCTION (l_or) {
|
INSTRUCTION (l_or) {
|
unsigned long temp1;
|
uorreg_t temp1;
|
temp1 = PARAM1 | PARAM2;
|
temp1 = PARAM1 | PARAM2;
|
set_ov_flag (temp1);
|
set_ov_flag (temp1);
|
SET_PARAM0(temp1);
|
SET_PARAM0(temp1);
|
}
|
}
|
INSTRUCTION (l_xor) {
|
INSTRUCTION (l_xor) {
|
unsigned long temp1;
|
uorreg_t temp1;
|
temp1 = PARAM1 ^ PARAM2;
|
temp1 = PARAM1 ^ PARAM2;
|
set_ov_flag (temp1);
|
set_ov_flag (temp1);
|
SET_PARAM0(temp1);
|
SET_PARAM0(temp1);
|
}
|
}
|
INSTRUCTION (l_sub) {
|
INSTRUCTION (l_sub) {
|
signed long temp1;
|
orreg_t temp1;
|
temp1 = (signed long)PARAM1 - (signed long)PARAM2;
|
temp1 = (orreg_t)PARAM1 - (orreg_t)PARAM2;
|
set_ov_flag (temp1);
|
set_ov_flag (temp1);
|
SET_PARAM0(temp1);
|
SET_PARAM0(temp1);
|
}
|
}
|
/*int mcount = 0;*/
|
/*int mcount = 0;*/
|
INSTRUCTION (l_mul) {
|
INSTRUCTION (l_mul) {
|
signed long temp1;
|
orreg_t temp1;
|
|
|
temp1 = PARAM1 * PARAM2;
|
temp1 = (orreg_t)PARAM1 * (orreg_t)PARAM2;
|
set_ov_flag (temp1);
|
set_ov_flag (temp1);
|
SET_PARAM0(temp1);
|
SET_PARAM0(temp1);
|
/*if (!(mcount++ & 1023)) {
|
/*if (!(mcount++ & 1023)) {
|
PRINTF ("[%i]\n",mcount);
|
PRINTF ("[%i]\n",mcount);
|
}*/
|
}*/
|
}
|
}
|
INSTRUCTION (l_div) {
|
INSTRUCTION (l_div) {
|
signed long temp3, temp2, temp1;
|
orreg_t temp3, temp2, temp1;
|
|
|
temp3 = PARAM2;
|
temp3 = PARAM2;
|
temp2 = PARAM1;
|
temp2 = PARAM1;
|
if (temp3)
|
if (temp3)
|
temp1 = temp2 / temp3;
|
temp1 = temp2 / temp3;
|
| Line 187... |
Line 187... |
}
|
}
|
set_ov_flag (temp1);
|
set_ov_flag (temp1);
|
SET_PARAM0(temp1);
|
SET_PARAM0(temp1);
|
}
|
}
|
INSTRUCTION (l_divu) {
|
INSTRUCTION (l_divu) {
|
unsigned long temp3, temp2, temp1;
|
uorreg_t temp3, temp2, temp1;
|
|
|
temp3 = PARAM2;
|
temp3 = PARAM2;
|
temp2 = PARAM1;
|
temp2 = PARAM1;
|
if (temp3)
|
if (temp3)
|
temp1 = temp2 / temp3;
|
temp1 = temp2 / temp3;
|
| Line 202... |
Line 202... |
set_ov_flag (temp1);
|
set_ov_flag (temp1);
|
SET_PARAM0(temp1);
|
SET_PARAM0(temp1);
|
/* runtime.sim.cycles += 16; */
|
/* runtime.sim.cycles += 16; */
|
}
|
}
|
INSTRUCTION (l_sll) {
|
INSTRUCTION (l_sll) {
|
unsigned long temp1;
|
uorreg_t temp1;
|
|
|
temp1 = PARAM1 << PARAM2;
|
temp1 = PARAM1 << PARAM2;
|
set_ov_flag (temp1);
|
set_ov_flag (temp1);
|
SET_PARAM0(temp1);
|
SET_PARAM0(temp1);
|
/* runtime.sim.cycles += 2; */
|
/* runtime.sim.cycles += 2; */
|
}
|
}
|
INSTRUCTION (l_sra) {
|
INSTRUCTION (l_sra) {
|
signed long temp1;
|
orreg_t temp1;
|
|
|
temp1 = (signed)PARAM1 >> PARAM2;
|
temp1 = (orreg_t)PARAM1 >> PARAM2;
|
set_ov_flag (temp1);
|
set_ov_flag (temp1);
|
SET_PARAM0(temp1);
|
SET_PARAM0(temp1);
|
/* runtime.sim.cycles += 2; */
|
/* runtime.sim.cycles += 2; */
|
}
|
}
|
INSTRUCTION (l_srl) {
|
INSTRUCTION (l_srl) {
|
unsigned long temp1;
|
uorreg_t temp1;
|
temp1 = PARAM1 >> PARAM2;
|
temp1 = PARAM1 >> PARAM2;
|
set_ov_flag (temp1);
|
set_ov_flag (temp1);
|
SET_PARAM0(temp1);
|
SET_PARAM0(temp1);
|
/* runtime.sim.cycles += 2; */
|
/* runtime.sim.cycles += 2; */
|
}
|
}
|
| Line 231... |
Line 231... |
int fwd = (PARAM0 >= pc) ? 1 : 0;
|
int fwd = (PARAM0 >= pc) ? 1 : 0;
|
or1k_mstats.bf[flag][fwd]++;
|
or1k_mstats.bf[flag][fwd]++;
|
bpb_update(current->insn_addr, flag);
|
bpb_update(current->insn_addr, flag);
|
}
|
}
|
if (flag) {
|
if (flag) {
|
pcdelay = pc + (signed)PARAM0 * 4;
|
pcdelay = pc + (orreg_t)PARAM0 * 4;
|
btic_update(pcnext);
|
btic_update(pcnext);
|
next_delay_insn = 1;
|
next_delay_insn = 1;
|
} else {
|
} else {
|
btic_update(pc);
|
btic_update(pc);
|
}
|
}
|
| Line 245... |
Line 245... |
int fwd = (PARAM0 >= pc) ? 1 : 0;
|
int fwd = (PARAM0 >= pc) ? 1 : 0;
|
or1k_mstats.bnf[!flag][fwd]++;
|
or1k_mstats.bnf[!flag][fwd]++;
|
bpb_update(current->insn_addr, flag == 0);
|
bpb_update(current->insn_addr, flag == 0);
|
}
|
}
|
if (flag == 0) {
|
if (flag == 0) {
|
pcdelay = pc + (signed)PARAM0 * 4;
|
pcdelay = pc + (orreg_t)PARAM0 * 4;
|
btic_update(pcnext);
|
btic_update(pcnext);
|
next_delay_insn = 1;
|
next_delay_insn = 1;
|
} else {
|
} else {
|
btic_update(pc);
|
btic_update(pc);
|
}
|
}
|
}
|
}
|
INSTRUCTION (l_j) {
|
INSTRUCTION (l_j) {
|
pcdelay = pc + (signed)PARAM0 * 4;
|
pcdelay = pc + (orreg_t)PARAM0 * 4;
|
next_delay_insn = 1;
|
next_delay_insn = 1;
|
}
|
}
|
INSTRUCTION (l_jal) {
|
INSTRUCTION (l_jal) {
|
pcdelay = pc + (signed)PARAM0 * 4;
|
pcdelay = pc + (orreg_t)PARAM0 * 4;
|
|
|
set_reg32(LINK_REGNO, pc + 8);
|
set_reg(LINK_REGNO, pc + 8);
|
next_delay_insn = 1;
|
next_delay_insn = 1;
|
if (config.sim.profile) {
|
if (config.sim.profile) {
|
struct label_entry *tmp;
|
struct label_entry *tmp;
|
if (verify_memoryarea(pcdelay) && (tmp = get_label (pcdelay)))
|
if (verify_memoryarea(pcdelay) && (tmp = get_label (pcdelay)))
|
fprintf (runtime.sim.fprof, "+%08llX %08lX %08lX %s\n",
|
fprintf (runtime.sim.fprof, "+%08llX %"PRIxADDR" %"PRIxADDR" %s\n",
|
runtime.sim.cycles, pc + 8, pcdelay, tmp->name);
|
runtime.sim.cycles, pc + 8, pcdelay, tmp->name);
|
else
|
else
|
fprintf (runtime.sim.fprof, "+%08llX %08lX %08lX @%08lX\n",
|
fprintf (runtime.sim.fprof, "+%08llX %"PRIxADDR" %"PRIxADDR" @%"PRIxADDR"\n",
|
runtime.sim.cycles, pc + 8, pcdelay, pcdelay);
|
runtime.sim.cycles, pc + 8, pcdelay, pcdelay);
|
}
|
}
|
}
|
}
|
INSTRUCTION (l_jalr) {
|
INSTRUCTION (l_jalr) {
|
pcdelay = PARAM0;
|
pcdelay = PARAM0;
|
set_reg32(LINK_REGNO, pc + 8);
|
set_reg(LINK_REGNO, pc + 8);
|
next_delay_insn = 1;
|
next_delay_insn = 1;
|
}
|
}
|
INSTRUCTION (l_jr) {
|
INSTRUCTION (l_jr) {
|
pcdelay = PARAM0;
|
pcdelay = PARAM0;
|
next_delay_insn = 1;
|
next_delay_insn = 1;
|
if (config.sim.profile)
|
if (config.sim.profile)
|
fprintf (runtime.sim.fprof, "-%08llX %08lX\n", runtime.sim.cycles, pcdelay);
|
fprintf (runtime.sim.fprof, "-%08llX %"PRIxADDR"\n", runtime.sim.cycles,
|
|
pcdelay);
|
}
|
}
|
INSTRUCTION (l_rfe) {
|
INSTRUCTION (l_rfe) {
|
pcnext = mfspr(SPR_EPCR_BASE);
|
pcnext = mfspr(SPR_EPCR_BASE);
|
mtspr(SPR_SR, mfspr(SPR_ESR_BASE));
|
mtspr(SPR_SR, mfspr(SPR_ESR_BASE));
|
}
|
}
|
INSTRUCTION (l_nop) {
|
INSTRUCTION (l_nop) {
|
unsigned long stackaddr;
|
oraddr_t stackaddr;
|
int k = PARAM0;
|
uint32_t k = PARAM0;
|
switch (k) {
|
switch (k) {
|
case NOP_NOP:
|
case NOP_NOP:
|
break;
|
break;
|
case NOP_EXIT:
|
case NOP_EXIT:
|
PRINTF("exit(%ld)\n", evalsim_reg32 (3));
|
PRINTF("exit(%"PRIdREG")\n", evalsim_reg (3));
|
fprintf(stderr, "@reset : cycles %lld, insn #%lld\n",
|
fprintf(stderr, "@reset : cycles %lld, insn #%lld\n",
|
runtime.sim.reset_cycles, runtime.cpu.reset_instructions);
|
runtime.sim.reset_cycles, runtime.cpu.reset_instructions);
|
fprintf(stderr, "@exit : cycles %lld, insn #%lld\n", runtime.sim.cycles,
|
fprintf(stderr, "@exit : cycles %lld, insn #%lld\n", runtime.sim.cycles,
|
runtime.cpu.instructions);
|
runtime.cpu.instructions);
|
fprintf(stderr, " diff : cycles %lld, insn #%lld\n",
|
fprintf(stderr, " diff : cycles %lld, insn #%lld\n",
|
| Line 314... |
Line 315... |
PRINTF("****************** counters reset ******************\n");
|
PRINTF("****************** counters reset ******************\n");
|
runtime.sim.reset_cycles = runtime.sim.cycles;
|
runtime.sim.reset_cycles = runtime.sim.cycles;
|
runtime.cpu.reset_instructions = runtime.cpu.instructions;
|
runtime.cpu.reset_instructions = runtime.cpu.instructions;
|
break;
|
break;
|
case NOP_PRINTF:
|
case NOP_PRINTF:
|
stackaddr = evalsim_reg32(4);
|
stackaddr = evalsim_reg(4);
|
simprintf(stackaddr, evalsim_reg32(3));
|
simprintf(stackaddr, evalsim_reg(3));
|
debug(5, "simprintf %x\n", stackaddr);
|
debug(5, "simprintf %x\n", stackaddr);
|
break;
|
break;
|
case NOP_REPORT:
|
case NOP_REPORT:
|
PRINTF("report(0x%lx);\n", evalsim_reg32(3));
|
PRINTF("report(0x%"PRIdREG");\n", evalsim_reg(3));
|
default:
|
default:
|
if (k >= NOP_REPORT_FIRST && k <= NOP_REPORT_LAST)
|
if (k >= NOP_REPORT_FIRST && k <= NOP_REPORT_LAST)
|
PRINTF("report %i (0x%lx);\n", k - NOP_REPORT_FIRST, evalsim_reg32(3));
|
PRINTF("report %i (0x%"PRIxREG");\n", k - NOP_REPORT_FIRST,
|
|
evalsim_reg(3));
|
break;
|
break;
|
}
|
}
|
}
|
}
|
INSTRUCTION (l_sfeq) {
|
INSTRUCTION (l_sfeq) {
|
flag = PARAM0 == PARAM1;
|
flag = PARAM0 == PARAM1;
|
| Line 335... |
Line 337... |
INSTRUCTION (l_sfne) {
|
INSTRUCTION (l_sfne) {
|
flag = PARAM0 != PARAM1;
|
flag = PARAM0 != PARAM1;
|
setsprbits(SPR_SR, SPR_SR_F, flag);
|
setsprbits(SPR_SR, SPR_SR_F, flag);
|
}
|
}
|
INSTRUCTION (l_sfgts) {
|
INSTRUCTION (l_sfgts) {
|
flag = (signed)PARAM0 > (signed)PARAM1;
|
flag = (orreg_t)PARAM0 > (orreg_t)PARAM1;
|
setsprbits(SPR_SR, SPR_SR_F, flag);
|
setsprbits(SPR_SR, SPR_SR_F, flag);
|
}
|
}
|
INSTRUCTION (l_sfges) {
|
INSTRUCTION (l_sfges) {
|
flag = (signed)PARAM0 >= (signed)PARAM1;
|
flag = (orreg_t)PARAM0 >= (orreg_t)PARAM1;
|
setsprbits(SPR_SR, SPR_SR_F, flag);
|
setsprbits(SPR_SR, SPR_SR_F, flag);
|
}
|
}
|
INSTRUCTION (l_sflts) {
|
INSTRUCTION (l_sflts) {
|
flag = (signed)PARAM0 < (signed)PARAM1;
|
flag = (orreg_t)PARAM0 < (orreg_t)PARAM1;
|
setsprbits(SPR_SR, SPR_SR_F, flag);
|
setsprbits(SPR_SR, SPR_SR_F, flag);
|
}
|
}
|
INSTRUCTION (l_sfles) {
|
INSTRUCTION (l_sfles) {
|
flag = (signed)PARAM0 <= (signed)PARAM1;
|
flag = (orreg_t)PARAM0 <= (orreg_t)PARAM1;
|
setsprbits(SPR_SR, SPR_SR_F, flag);
|
setsprbits(SPR_SR, SPR_SR_F, flag);
|
}
|
}
|
INSTRUCTION (l_sfgtu) {
|
INSTRUCTION (l_sfgtu) {
|
flag = (unsigned)PARAM0 > (unsigned)PARAM1;
|
flag = PARAM0 > PARAM1;
|
setsprbits(SPR_SR, SPR_SR_F, flag);
|
setsprbits(SPR_SR, SPR_SR_F, flag);
|
}
|
}
|
INSTRUCTION (l_sfgeu) {
|
INSTRUCTION (l_sfgeu) {
|
flag = (unsigned)PARAM0 >= (unsigned)PARAM1;
|
flag = PARAM0 >= PARAM1;
|
setsprbits(SPR_SR, SPR_SR_F, flag);
|
setsprbits(SPR_SR, SPR_SR_F, flag);
|
}
|
}
|
INSTRUCTION (l_sfltu) {
|
INSTRUCTION (l_sfltu) {
|
flag = (unsigned)PARAM0 < (unsigned)PARAM1;
|
flag = PARAM0 < PARAM1;
|
setsprbits(SPR_SR, SPR_SR_F, flag);
|
setsprbits(SPR_SR, SPR_SR_F, flag);
|
}
|
}
|
INSTRUCTION (l_sfleu) {
|
INSTRUCTION (l_sfleu) {
|
flag = (unsigned)PARAM0 <= (unsigned)PARAM1;
|
flag = PARAM0 <= PARAM1;
|
setsprbits(SPR_SR, SPR_SR_F, flag);
|
setsprbits(SPR_SR, SPR_SR_F, flag);
|
}
|
}
|
INSTRUCTION (l_extbs) {
|
INSTRUCTION (l_extbs) {
|
unsigned char x;
|
int8_t x;
|
x = PARAM1;
|
x = PARAM1;
|
SET_PARAM0((signed long)x);
|
SET_PARAM0((orreg_t)x);
|
}
|
}
|
INSTRUCTION (l_extbz) {
|
INSTRUCTION (l_extbz) {
|
unsigned char x;
|
uint8_t x;
|
x = PARAM1;
|
x = PARAM1;
|
SET_PARAM0((unsigned long)x);
|
SET_PARAM0((uorreg_t)x);
|
}
|
}
|
INSTRUCTION (l_exths) {
|
INSTRUCTION (l_exths) {
|
unsigned short x;
|
int16_t x;
|
x = PARAM1;
|
x = PARAM1;
|
SET_PARAM0((signed long)x);
|
SET_PARAM0((orreg_t)x);
|
}
|
}
|
INSTRUCTION (l_exthz) {
|
INSTRUCTION (l_exthz) {
|
unsigned short x;
|
uint16_t x;
|
x = PARAM1;
|
x = PARAM1;
|
SET_PARAM0((unsigned long)x);
|
SET_PARAM0((uorreg_t)x);
|
}
|
}
|
INSTRUCTION (l_extws) {
|
INSTRUCTION (l_extws) {
|
unsigned int x;
|
int32_t x;
|
x = PARAM1;
|
x = PARAM1;
|
SET_PARAM0((signed long)x);
|
SET_PARAM0((orreg_t)x);
|
}
|
}
|
INSTRUCTION (l_extwz) {
|
INSTRUCTION (l_extwz) {
|
unsigned int x;
|
uint32_t x;
|
x = PARAM1;
|
x = PARAM1;
|
SET_PARAM0((unsigned long)x);
|
SET_PARAM0((uorreg_t)x);
|
}
|
}
|
INSTRUCTION (l_mtspr) {
|
INSTRUCTION (l_mtspr) {
|
unsigned long regno = PARAM0 + PARAM2;
|
uint16_t regno = PARAM0 + PARAM2;
|
unsigned long value = PARAM1;
|
uorreg_t value = PARAM1;
|
|
|
if (runtime.sim.fspr_log) {
|
if (runtime.sim.fspr_log) {
|
fprintf(runtime.sim.fspr_log, "Write to SPR : [%08lX] <- [%08lX]\n", regno, value);
|
fprintf(runtime.sim.fspr_log, "Write to SPR : [%08"PRIx16"] <- [%08"PRIx32"]\n", regno, value);
|
}
|
}
|
|
|
if (mfspr(SPR_SR) & SPR_SR_SM)
|
if (mfspr(SPR_SR) & SPR_SR_SM)
|
mtspr(regno, value);
|
mtspr(regno, value);
|
else {
|
else {
|
PRINTF("WARNING: trying to write SPR while SR[SUPV] is cleared.\n");
|
PRINTF("WARNING: trying to write SPR while SR[SUPV] is cleared.\n");
|
runtime.sim.cont_run = 0;
|
runtime.sim.cont_run = 0;
|
}
|
}
|
}
|
}
|
INSTRUCTION (l_mfspr) {
|
INSTRUCTION (l_mfspr) {
|
unsigned long regno = PARAM1 + PARAM2;
|
uint16_t regno = PARAM1 + PARAM2;
|
unsigned long value = mfspr(regno);
|
uorreg_t value = mfspr(regno);
|
|
|
if (runtime.sim.fspr_log) {
|
if (runtime.sim.fspr_log) {
|
fprintf(runtime.sim.fspr_log, "Read from SPR : [%08lX] -> [%08lX]\n", regno, value);
|
fprintf(runtime.sim.fspr_log, "Read from SPR : [%08"PRIx16"] -> [%08"PRIx32"]\n", regno, value);
|
}
|
}
|
|
|
if (mfspr(SPR_SR) & SPR_SR_SM)
|
if (mfspr(SPR_SR) & SPR_SR_SM)
|
SET_PARAM0(value);
|
SET_PARAM0(value);
|
else {
|
else {
|
| Line 437... |
Line 439... |
except_handle(EXCEPT_TRAP, mfspr(SPR_EEAR_BASE));
|
except_handle(EXCEPT_TRAP, mfspr(SPR_EEAR_BASE));
|
}
|
}
|
INSTRUCTION (l_mac) {
|
INSTRUCTION (l_mac) {
|
sprword lo, hi;
|
sprword lo, hi;
|
LONGEST l;
|
LONGEST l;
|
long x, y;
|
orreg_t x, y;
|
|
|
lo = mfspr (SPR_MACLO);
|
lo = mfspr (SPR_MACLO);
|
hi = mfspr (SPR_MACHI);
|
hi = mfspr (SPR_MACHI);
|
x = PARAM0;
|
x = PARAM0;
|
y = PARAM1;
|
y = PARAM1;
|
PRINTF ("[%08lx,%08lx]\t", (unsigned long)(x), (unsigned long)(y));
|
PRINTF ("[%"PRIxREG",%"PRIxREG"]\t", x, y);
|
l = (ULONGEST)lo | ((LONGEST)hi << 32);
|
l = (ULONGEST)lo | ((LONGEST)hi << 32);
|
l += (LONGEST) x * (LONGEST) y;
|
l += (LONGEST) x * (LONGEST) y;
|
|
|
/* This implementation is very fast - it needs only one cycle for mac. */
|
/* This implementation is very fast - it needs only one cycle for mac. */
|
lo = ((ULONGEST)l) & 0xFFFFFFFF;
|
lo = ((ULONGEST)l) & 0xFFFFFFFF;
|
| Line 456... |
Line 459... |
PRINTF ("(%08lx,%08lx)\n", hi, lo);
|
PRINTF ("(%08lx,%08lx)\n", hi, lo);
|
}
|
}
|
INSTRUCTION (l_msb) {
|
INSTRUCTION (l_msb) {
|
sprword lo, hi;
|
sprword lo, hi;
|
LONGEST l;
|
LONGEST l;
|
long x, y;
|
orreg_t x, y;
|
|
|
lo = mfspr (SPR_MACLO);
|
lo = mfspr (SPR_MACLO);
|
hi = mfspr (SPR_MACHI);
|
hi = mfspr (SPR_MACHI);
|
x = PARAM0;
|
x = PARAM0;
|
y = PARAM1;
|
y = PARAM1;
|
PRINTF ("[%08lx,%08lx]\t", (unsigned long)(x), (unsigned long)(y));
|
|
|
PRINTF ("[%"PRIxREG",%"PRIxREG"]\t", x, y);
|
|
|
l = (ULONGEST)lo | ((LONGEST)hi << 32);
|
l = (ULONGEST)lo | ((LONGEST)hi << 32);
|
l -= x * y;
|
l -= x * y;
|
|
|
/* This implementation is very fast - it needs only one cycle for msb. */
|
/* This implementation is very fast - it needs only one cycle for msb. */
|
lo = ((ULONGEST)l) & 0xFFFFFFFF;
|
lo = ((ULONGEST)l) & 0xFFFFFFFF;
|
| Line 481... |
Line 487... |
lo = mfspr (SPR_MACLO);
|
lo = mfspr (SPR_MACLO);
|
hi = mfspr (SPR_MACHI);
|
hi = mfspr (SPR_MACHI);
|
l = (ULONGEST) lo | ((LONGEST)hi << 32);
|
l = (ULONGEST) lo | ((LONGEST)hi << 32);
|
l >>= 28;
|
l >>= 28;
|
//PRINTF ("<%08x>\n", (unsigned long)l);
|
//PRINTF ("<%08x>\n", (unsigned long)l);
|
SET_PARAM0((long)l);
|
SET_PARAM0((orreg_t)l);
|
mtspr (SPR_MACLO, 0);
|
mtspr (SPR_MACLO, 0);
|
mtspr (SPR_MACHI, 0);
|
mtspr (SPR_MACHI, 0);
|
}
|
}
|
INSTRUCTION (l_cmov) {
|
INSTRUCTION (l_cmov) {
|
SET_PARAM0(flag ? PARAM1 : PARAM2);
|
SET_PARAM0(flag ? PARAM1 : PARAM2);
|
| Line 494... |
Line 500... |
SET_PARAM0(ffs(PARAM1));
|
SET_PARAM0(ffs(PARAM1));
|
}
|
}
|
/******* Floating point instructions *******/
|
/******* Floating point instructions *******/
|
/* Single precision */
|
/* Single precision */
|
INSTRUCTION (lf_add_s) {
|
INSTRUCTION (lf_add_s) {
|
SET_PARAM0((machword)((float)PARAM1 + (float)PARAM2));
|
SET_PARAM0((float)PARAM1 + (float)PARAM2);
|
}
|
}
|
INSTRUCTION (lf_div_s) {
|
INSTRUCTION (lf_div_s) {
|
SET_PARAM0((machword)((float)PARAM1 / (float)PARAM2));
|
SET_PARAM0((float)PARAM1 / (float)PARAM2);
|
}
|
}
|
INSTRUCTION (lf_ftoi_s) {
|
INSTRUCTION (lf_ftoi_s) {
|
// set_operand32(0, freg[get_operand(1)], &breakpoint);
|
// set_operand32(0, freg[get_operand(1)], &breakpoint);
|
}
|
}
|
INSTRUCTION (lf_itof_s) {
|
INSTRUCTION (lf_itof_s) {
|
// freg[get_operand(0)] = eval_operand32(1, &breakpoint);
|
// freg[get_operand(0)] = eval_operand32(1, &breakpoint);
|
}
|
}
|
INSTRUCTION (lf_madd_s) {
|
INSTRUCTION (lf_madd_s) {
|
SET_PARAM0((machword)((float)PARAM0 + (float)PARAM1 * (float)PARAM2));
|
SET_PARAM0((float)PARAM0 + (float)PARAM1 * (float)PARAM2);
|
}
|
}
|
INSTRUCTION (lf_mul_s) {
|
INSTRUCTION (lf_mul_s) {
|
SET_PARAM0((machword)((float)PARAM1 * (float)PARAM2));
|
SET_PARAM0((float)PARAM1 * (float)PARAM2);
|
}
|
}
|
INSTRUCTION (lf_rem_s) {
|
INSTRUCTION (lf_rem_s) {
|
float temp = (float)PARAM1 / (float)PARAM2;
|
float temp = (float)PARAM1 / (float)PARAM2;
|
SET_PARAM0(temp - (machword)temp);
|
SET_PARAM0(temp - (uint32_t)temp);
|
}
|
}
|
INSTRUCTION (lf_sfeq_s) {
|
INSTRUCTION (lf_sfeq_s) {
|
flag = (float)PARAM0 == (float)PARAM1;
|
flag = (float)PARAM0 == (float)PARAM1;
|
setsprbits(SPR_SR, SPR_SR_F, flag);
|
setsprbits(SPR_SR, SPR_SR_F, flag);
|
}
|
}
|
| Line 540... |
Line 546... |
INSTRUCTION (lf_sfne_s) {
|
INSTRUCTION (lf_sfne_s) {
|
flag = (float)PARAM0 != (float)PARAM1;
|
flag = (float)PARAM0 != (float)PARAM1;
|
setsprbits(SPR_SR, SPR_SR_F, flag);
|
setsprbits(SPR_SR, SPR_SR_F, flag);
|
}
|
}
|
INSTRUCTION (lf_sub_s) {
|
INSTRUCTION (lf_sub_s) {
|
SET_PARAM0((machword)((float)PARAM1 - (float)PARAM2));
|
SET_PARAM0((float)PARAM1 - (float)PARAM2);
|
}
|
}
|
|
|
/******* Custom instructions *******/
|
/******* Custom instructions *******/
|
INSTRUCTION (l_cust1) {
|
INSTRUCTION (l_cust1) {
|
/*int destr = current->insn >> 21;
|
/*int destr = current->insn >> 21;
|
