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[/] [or1k/] [trunk/] [or1ksim/] [cpu/] [or32/] [insnset.c] - Diff between revs 1651 and 1744

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Line 1... Line 1...
/* execute.c -- Instruction specific functions.
/* execute.c -- Instruction specific functions.
 
 
   Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
   Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
                 2000-2002 Marko Mlinar, markom@opencores.org
                 2000-2002 Marko Mlinar, markom@opencores.org
 
   Copyright (C) 2008 Embecosm Limited
 
 
 
   Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
 
 
This file is part of OpenRISC 1000 Architectural Simulator.
This file is part of OpenRISC 1000 Architectural Simulator.
 
 
This program is free software; you can redistribute it and/or modify
   This program is free software; you can redistribute it and/or modify it
it under the terms of the GNU General Public License as published by
   under the terms of the GNU General Public License as published by the Free
the Free Software Foundation; either version 2 of the License, or
   Software Foundation; either version 3 of the License, or (at your option)
(at your option) any later version.
   any later version.
 
 
This program is distributed in the hope that it will be useful,
   This program is distributed in the hope that it will be useful, but WITHOUT
but WITHOUT ANY WARRANTY; without even the implied warranty of
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
GNU General Public License for more details.
   more details.
 
 
You should have received a copy of the GNU General Public License
   You should have received a copy of the GNU General Public License along
along with this program; if not, write to the Free Software
   with this program.  If not, see <http://www.gnu.org/licenses/>. */
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
 
 
 
INSTRUCTION (l_add) {
INSTRUCTION (l_add) {
  orreg_t temp1, temp2, temp3;
  orreg_t temp1, temp2, temp3;
  int8_t temp4;
  int8_t temp4;
 
 
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}
}
INSTRUCTION (l_lwz) {
INSTRUCTION (l_lwz) {
  uint32_t val;
  uint32_t val;
  if (config.cpu.sbuf_len) sbuf_load ();
  if (config.cpu.sbuf_len) sbuf_load ();
  val = eval_mem32(PARAM1, &breakpoint);
  val = eval_mem32(PARAM1, &breakpoint);
  /* If eval operand produced exception don't set anything */
  /* If eval operand produced exception don't set anything. JPB changed to
  if (!except_pending)
     trigger on breakpoint, as well as except_pending (seemed to be a bug). */
 
  if (!(except_pending || breakpoint))
    SET_PARAM0(val);
    SET_PARAM0(val);
}
}
INSTRUCTION (l_lbs) {
INSTRUCTION (l_lbs) {
  int8_t val;
  int8_t val;
  if (config.cpu.sbuf_len) sbuf_load ();
  if (config.cpu.sbuf_len) sbuf_load ();
  val = eval_mem8(PARAM1, &breakpoint);
  val = eval_mem8(PARAM1, &breakpoint);
  /* If eval opreand produced exception don't set anything */
  /* If eval operand produced exception don't set anything. JPB changed to
  if (!except_pending)
     trigger on breakpoint, as well as except_pending (seemed to be a bug). */
 
  if (!(except_pending || breakpoint))
    SET_PARAM0(val);
    SET_PARAM0(val);
}
}
INSTRUCTION (l_lbz) {
INSTRUCTION (l_lbz) {
  uint8_t val;
  uint8_t val;
  if (config.cpu.sbuf_len) sbuf_load ();
  if (config.cpu.sbuf_len) sbuf_load ();
  val = eval_mem8(PARAM1, &breakpoint);
  val = eval_mem8(PARAM1, &breakpoint);
  /* If eval opreand produced exception don't set anything */
  /* If eval operand produced exception don't set anything. JPB changed to
  if (!except_pending)
     trigger on breakpoint, as well as except_pending (seemed to be a bug). */
 
  if (!(except_pending || breakpoint))
    SET_PARAM0(val);
    SET_PARAM0(val);
}
}
INSTRUCTION (l_lhs) {
INSTRUCTION (l_lhs) {
  int16_t val;
  int16_t val;
  if (config.cpu.sbuf_len) sbuf_load ();
  if (config.cpu.sbuf_len) sbuf_load ();
  val = eval_mem16(PARAM1, &breakpoint);
  val = eval_mem16(PARAM1, &breakpoint);
  /* If eval opreand produced exception don't set anything */
  /* If eval operand produced exception don't set anything. JPB changed to
  if (!except_pending)
     trigger on breakpoint, as well as except_pending (seemed to be a bug). */
 
  if (!(except_pending || breakpoint))
    SET_PARAM0(val);
    SET_PARAM0(val);
}
}
INSTRUCTION (l_lhz) {
INSTRUCTION (l_lhz) {
  uint16_t val;
  uint16_t val;
  if (config.cpu.sbuf_len) sbuf_load ();
  if (config.cpu.sbuf_len) sbuf_load ();
  val = eval_mem16(PARAM1, &breakpoint);
  val = eval_mem16(PARAM1, &breakpoint);
  /* If eval opreand produced exception don't set anything */
  /* If eval operand produced exception don't set anything. JPB changed to
  if (!except_pending)
     trigger on breakpoint, as well as except_pending (seemed to be a bug). */
 
  if (!(except_pending || breakpoint))
    SET_PARAM0(val);
    SET_PARAM0(val);
}
}
INSTRUCTION (l_movhi) {
INSTRUCTION (l_movhi) {
  SET_PARAM0(PARAM1 << 16);
  SET_PARAM0(PARAM1 << 16);
}
}
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      break;
      break;
    case NOP_PRINTF:
    case NOP_PRINTF:
      stackaddr = evalsim_reg(4);
      stackaddr = evalsim_reg(4);
      simprintf(stackaddr, evalsim_reg(3));
      simprintf(stackaddr, evalsim_reg(3));
      break;
      break;
 
    case NOP_PUTC:              /*JPB */
 
      printf( "%c", evalsim_reg( 3 ));
 
      fflush( stdout );
 
      break;
    case NOP_REPORT:
    case NOP_REPORT:
      PRINTF("report(0x%"PRIxREG");\n", evalsim_reg(3));
      PRINTF("report(0x%"PRIxREG");\n", evalsim_reg(3));
    default:
    default:
      if (k >= NOP_REPORT_FIRST && k <= NOP_REPORT_LAST)
      if (k >= NOP_REPORT_FIRST && k <= NOP_REPORT_LAST)
      PRINTF("report %i (0x%"PRIxREG");\n", k - NOP_REPORT_FIRST,
      PRINTF("report %i (0x%"PRIxREG");\n", k - NOP_REPORT_FIRST,

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