Line 22... |
Line 22... |
#include <stdarg.h>
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#include <stdarg.h>
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#include <assert.h>
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#include <assert.h>
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#include "cuc.h"
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#include "cuc.h"
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#include "insn.h"
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#include "insn.h"
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#include "profiler.h"
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#include "profiler.h"
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#include "sim-config.h"
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/* Shortcut */
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/* Shortcut */
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#define GEN(x...) fprintf (fo, x)
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#define GEN(x...) fprintf (fo, x)
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/* Find index of load/store/call */
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/* Find index of load/store/call */
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Line 62... |
Line 63... |
II_IS_LOAD (f->INSN(t->ref).index) ? 'l' : 's', find_lsc_index (f, t->ref));
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II_IS_LOAD (f->INSN(t->ref).index) ? 'l' : 's', find_lsc_index (f, t->ref));
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} else if (f->INSN(t->ref).index == II_CALL) {
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} else if (f->INSN(t->ref).index == II_CALL) {
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int x;
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int x;
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GEN ("%sf_end[%i]", first ? " && " : "", find_lsc_index (f, t->ref));
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GEN ("%sf_end[%i]", first ? " && " : "", find_lsc_index (f, t->ref));
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} else {
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} else {
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printf ("print_deps: err %x\n", t->ref);
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PRINTF ("print_deps: err %x\n", t->ref);
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assert (0);
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assert (0);
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}
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}
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first = 1;
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first = 1;
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t = t->next;
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t = t->next;
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}
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}
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Line 214... |
Line 215... |
cuc_bb *end_bb = NULL;
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cuc_bb *end_bb = NULL;
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int end_bb_no = -1;
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int end_bb_no = -1;
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sprintf (tmp, "%s.v", filename);
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sprintf (tmp, "%s.v", filename);
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log ("Generating verilog file \"%s\"\n", tmp);
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log ("Generating verilog file \"%s\"\n", tmp);
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printf ("Generating verilog file \"%s\"\n", tmp);
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PRINTF ("Generating verilog file \"%s\"\n", tmp);
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if ((fo = fopen (tmp, "wt+")) == NULL) {
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if ((fo = fopen (tmp, "wt+")) == NULL) {
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fprintf (stderr, "Cannot open '%s'\n", tmp);
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fprintf (stderr, "Cannot open '%s'\n", tmp);
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exit (1);
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exit (1);
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}
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}
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Line 540... |
Line 541... |
for (i = 0; i < f->nmsched; i++)
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for (i = 0; i < f->nmsched; i++)
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if (f->mtype[i] & MT_STORE) {
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if (f->mtype[i] & MT_STORE) {
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char t[30];
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char t[30];
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GEN (" %sif (s_stb[%i]) swb_dat_o = %s;\n", i ? "else " : "", cur_store++,
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GEN (" %sif (s_stb[%i]) swb_dat_o = %s;\n", i ? "else " : "", cur_store++,
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print_op_v (f, t, f->msched[i], 0));
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print_op_v (f, t, f->msched[i], 0));
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//printf ("msched[%i] = %x (mtype %x) %x\n", i, f->msched[i], f->mtype[i], f->INSN(f->msched[i]).op[0]);
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//PRINTF ("msched[%i] = %x (mtype %x) %x\n", i, f->msched[i], f->mtype[i], f->INSN(f->msched[i]).op[0]);
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}
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}
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GEN ("end\n");
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GEN ("end\n");
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}
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}
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/* Generate load and store state machine */
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/* Generate load and store state machine */
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Line 700... |
Line 701... |
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for (i = 0; i < nrf; i++)
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for (i = 0; i < nrf; i++)
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if (maxncallees < ncallees[i]) maxncallees = ncallees[i];
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if (maxncallees < ncallees[i]) maxncallees = ncallees[i];
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log ("Generating verilog file \"%s\"\n", tmp);
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log ("Generating verilog file \"%s\"\n", tmp);
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printf ("Generating verilog file \"%s\"\n", tmp);
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PRINTF ("Generating verilog file \"%s\"\n", tmp);
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if ((fo = fopen (tmp, "wt+")) == NULL) {
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if ((fo = fopen (tmp, "wt+")) == NULL) {
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fprintf (stderr, "Cannot open '%s'\n", tmp);
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fprintf (stderr, "Cannot open '%s'\n", tmp);
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exit (1);
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exit (1);
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}
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}
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