| Line 296... |
Line 296... |
}
|
}
|
if (start_set < end_set) PRINTF("\n");
|
if (start_set < end_set) PRINTF("\n");
|
}
|
}
|
|
|
/*---------------------------------------------------[ DMMU configuration ]---*/
|
/*---------------------------------------------------[ DMMU configuration ]---*/
|
void dmmu_enabled(union param_val val, void *dat)
|
static void dmmu_enabled(union param_val val, void *dat)
|
{
|
{
|
if(val.int_val)
|
if(val.int_val)
|
cpu_state.sprs[SPR_UPR] |= SPR_UPR_DMP;
|
cpu_state.sprs[SPR_UPR] |= SPR_UPR_DMP;
|
else
|
else
|
cpu_state.sprs[SPR_UPR] &= ~SPR_UPR_DMP;
|
cpu_state.sprs[SPR_UPR] &= ~SPR_UPR_DMP;
|
config.dmmu.enabled = val.int_val;
|
config.dmmu.enabled = val.int_val;
|
}
|
}
|
|
|
void dmmu_nsets(union param_val val, void *dat)
|
static void dmmu_nsets(union param_val val, void *dat)
|
{
|
{
|
if (is_power2(val.int_val) && val.int_val <= 256) {
|
if (is_power2(val.int_val) && val.int_val <= 256) {
|
config.dmmu.nsets = val.int_val;
|
config.dmmu.nsets = val.int_val;
|
cpu_state.sprs[SPR_DMMUCFGR] &= ~SPR_DMMUCFGR_NTS;
|
cpu_state.sprs[SPR_DMMUCFGR] &= ~SPR_DMMUCFGR_NTS;
|
cpu_state.sprs[SPR_DMMUCFGR] |= log2_int(val.int_val) << 3;
|
cpu_state.sprs[SPR_DMMUCFGR] |= log2_int(val.int_val) << 3;
|
} else
|
} else
|
CONFIG_ERROR("value of power of two and lower or equal than 256 expected.");
|
CONFIG_ERROR("value of power of two and lower or equal than 256 expected.");
|
}
|
}
|
|
|
void dmmu_nways(union param_val val, void *dat)
|
static void dmmu_nways(union param_val val, void *dat)
|
{
|
{
|
if (val.int_val >= 1 && val.int_val <= 4) {
|
if (val.int_val >= 1 && val.int_val <= 4) {
|
config.dmmu.nways = val.int_val;
|
config.dmmu.nways = val.int_val;
|
cpu_state.sprs[SPR_DMMUCFGR] &= ~SPR_DMMUCFGR_NTW;
|
cpu_state.sprs[SPR_DMMUCFGR] &= ~SPR_DMMUCFGR_NTW;
|
cpu_state.sprs[SPR_DMMUCFGR] |= val.int_val - 1;
|
cpu_state.sprs[SPR_DMMUCFGR] |= val.int_val - 1;
|
}
|
}
|
else
|
else
|
CONFIG_ERROR("value 1, 2, 3 or 4 expected.");
|
CONFIG_ERROR("value 1, 2, 3 or 4 expected.");
|
}
|
}
|
|
|
void dmmu_pagesize(union param_val val, void *dat)
|
static void dmmu_pagesize(union param_val val, void *dat)
|
{
|
{
|
if (is_power2(val.int_val))
|
if (is_power2(val.int_val))
|
config.dmmu.pagesize = val.int_val;
|
config.dmmu.pagesize = val.int_val;
|
else
|
else
|
CONFIG_ERROR("value of power of two expected.");
|
CONFIG_ERROR("value of power of two expected.");
|
}
|
}
|
|
|
void dmmu_entrysize(union param_val val, void *dat)
|
static void dmmu_entrysize(union param_val val, void *dat)
|
{
|
{
|
if (is_power2(val.int_val))
|
if (is_power2(val.int_val))
|
config.dmmu.entrysize = val.int_val;
|
config.dmmu.entrysize = val.int_val;
|
else
|
else
|
CONFIG_ERROR("value of power of two expected.");
|
CONFIG_ERROR("value of power of two expected.");
|
}
|
}
|
|
|
void dmmu_ustates(union param_val val, void *dat)
|
static void dmmu_ustates(union param_val val, void *dat)
|
{
|
{
|
if (val.int_val >= 2 && val.int_val <= 4)
|
if (val.int_val >= 2 && val.int_val <= 4)
|
config.dmmu.ustates = val.int_val;
|
config.dmmu.ustates = val.int_val;
|
else
|
else
|
CONFIG_ERROR("invalid USTATE.");
|
CONFIG_ERROR("invalid USTATE.");
|
}
|
}
|
|
|
void dmmu_missdelay(union param_val val, void *dat)
|
static void dmmu_missdelay(union param_val val, void *dat)
|
{
|
{
|
config.dmmu.missdelay = val.int_val;
|
config.dmmu.missdelay = val.int_val;
|
}
|
}
|
|
|
void dmmu_hitdelay(union param_val val, void *dat)
|
static void dmmu_hitdelay(union param_val val, void *dat)
|
{
|
{
|
config.immu.hitdelay = val.int_val;
|
config.immu.hitdelay = val.int_val;
|
}
|
}
|
|
|
void reg_dmmu_sec(void)
|
void reg_dmmu_sec(void)
|
