| Line 15... |
Line 15... |
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You should have received a copy of the GNU General Public License
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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/* IMMU model (not functional yet, currently just copy of data cache). */
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/* IMMU model, perfectly functional. */
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#include "config.h"
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#include "config.h"
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#ifdef HAVE_INTTYPES_H
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#ifdef HAVE_INTTYPES_H
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#include <inttypes.h>
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#include <inttypes.h>
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| Line 40... |
Line 40... |
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DEFAULT_DEBUG_CHANNEL(immu);
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DEFAULT_DEBUG_CHANNEL(immu);
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/* Insn MMU */
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/* Insn MMU */
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static inline oraddr_t immu_simulate_tlb(oraddr_t virtaddr)
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/* Precalculates some values for use during address translation */
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void init_immu(void)
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{
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config.immu.pagesize_log2 = log2(config.immu.pagesize);
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config.immu.page_offset_mask = config.immu.pagesize - 1;
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config.immu.page_mask = ~config.immu.page_offset_mask;
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config.immu.vpn_mask = ~((config.immu.pagesize * config.immu.nsets) - 1);
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config.immu.set_mask = config.immu.nsets - 1;
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config.immu.lru_reload = (config.immu.set_mask << 6) & SPR_ITLBMR_LRU;
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}
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inline uorreg_t *immu_find_tlbmr(oraddr_t virtaddr, uorreg_t **itlbmr_lru)
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{
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int set;
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int i;
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oraddr_t vpn;
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uorreg_t *itlbmr;
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/* Which set to check out? */
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set = IADDR_PAGE(virtaddr) >> config.immu.pagesize_log2;
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set &= config.immu.set_mask;
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vpn = virtaddr & config.immu.vpn_mask;
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itlbmr = &cpu_state.sprs[SPR_ITLBMR_BASE(0) + set];
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*itlbmr_lru = itlbmr;
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/* Scan all ways and try to find a matching way. */
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/* FIXME: Should this be reversed? */
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for(i = config.immu.nways; i; i--, itlbmr += (128 * 2)) {
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if(((*itlbmr & config.immu.vpn_mask) == vpn) && (*itlbmr & SPR_ITLBMR_V))
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return itlbmr;
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}
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return NULL;
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}
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oraddr_t immu_translate(oraddr_t virtaddr)
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{
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{
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int set, way = -1;
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int i;
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int i;
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oraddr_t tagaddr;
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uorreg_t *itlbmr;
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oraddr_t vpn, ppn;
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uorreg_t *itlbtr;
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uorreg_t *itlbmr_lru;
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if (!(cpu_state.sprs[SPR_SR] & SPR_SR_IME) ||
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if (!(cpu_state.sprs[SPR_SR] & SPR_SR_IME) ||
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!(cpu_state.sprs[SPR_UPR] & SPR_UPR_IMP)) {
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!(cpu_state.sprs[SPR_UPR] & SPR_UPR_IMP)) {
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insn_ci = (virtaddr >= 0x80000000);
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insn_ci = (virtaddr >= 0x80000000);
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return virtaddr;
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return virtaddr;
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}
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}
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TRACE("IMMU enabled, checking mmu ways\n");
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itlbmr = immu_find_tlbmr(virtaddr, &itlbmr_lru);
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/* Which set to check out? */
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set = (virtaddr / config.immu.pagesize) % config.immu.nsets;
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tagaddr = (virtaddr / config.immu.pagesize) / config.immu.nsets;
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vpn = virtaddr / (config.immu.pagesize * config.immu.nsets);
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/* Scan all ways and try to find a matching way. */
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for (i = 0; i < config.immu.nways; i++)
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if (((cpu_state.sprs[SPR_ITLBMR_BASE(i) + set] / (config.immu.pagesize * config.immu.nsets)) == vpn) &&
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(cpu_state.sprs[SPR_ITLBMR_BASE(i) + set] & SPR_ITLBMR_V))
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way = i;
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/* Did we find our tlb entry? */
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/* Did we find our tlb entry? */
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if (way >= 0) { /* Yes, we did. */
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if(itlbmr) { /* Yes, we did. */
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immu_stats.fetch_tlbhit++;
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immu_stats.fetch_tlbhit++;
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TRACE("ITLB hit (virtaddr=%"PRIxADDR").\n", virtaddr);
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TRACE("ITLB hit (virtaddr=%"PRIxADDR").\n", virtaddr);
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itlbtr = itlbmr + 128;
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/* Set LRUs */
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/* Set LRUs */
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for (i = 0; i < config.immu.nways; i++) {
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for(i = 0; i < config.immu.nways; i++, itlbmr_lru += (128 * 2)) {
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uorreg_t lru = cpu_state.sprs[SPR_ITLBMR_BASE(i) + set];
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if(*itlbmr_lru & SPR_ITLBMR_LRU)
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if (lru & SPR_ITLBMR_LRU) {
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*itlbmr_lru = (*itlbmr_lru & ~SPR_ITLBMR_LRU) |
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lru = (lru & ~SPR_ITLBMR_LRU) | ((lru & SPR_ITLBMR_LRU) - 0x40);
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((*itlbmr_lru & SPR_ITLBMR_LRU) - 0x40);
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cpu_state.sprs[SPR_ITLBMR_BASE(i) + set] = lru;
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}
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}
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}
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cpu_state.sprs[SPR_ITLBMR_BASE(way) + set] &= ~SPR_ITLBMR_LRU;
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cpu_state.sprs[SPR_ITLBMR_BASE(way) + set] |= (config.immu.nsets - 1) << 6;
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/* This is not necessary `*itlbmr &= ~SPR_ITLBMR_LRU;' since SPR_DTLBMR_LRU
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* is always decremented and the number of sets is always a power of two and
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* as such lru_reload has all bits set that get touched during decrementing
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* SPR_DTLBMR_LRU */
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*itlbmr |= config.immu.lru_reload;
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/* Check if page is cache inhibited */
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/* Check if page is cache inhibited */
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insn_ci = (cpu_state.sprs[SPR_ITLBTR_BASE(way) + set] & SPR_ITLBTR_CI) == SPR_ITLBTR_CI;
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insn_ci = *itlbtr & SPR_ITLBTR_CI;
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runtime.sim.mem_cycles += config.immu.hitdelay;
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runtime.sim.mem_cycles += config.immu.hitdelay;
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/* Test for page fault */
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/* Test for page fault */
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if (cpu_state.sprs[SPR_SR] & SPR_SR_SM) {
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if (cpu_state.sprs[SPR_SR] & SPR_SR_SM) {
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if (!(cpu_state.sprs[SPR_ITLBTR_BASE(way) + set] & SPR_ITLBTR_SXE))
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if (!(*itlbtr & SPR_ITLBTR_SXE))
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except_handle(EXCEPT_IPF, virtaddr);
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except_handle(EXCEPT_IPF, virtaddr);
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} else {
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} else {
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if (!(cpu_state.sprs[SPR_ITLBTR_BASE(way) + set] & SPR_ITLBTR_UXE))
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if (!(*itlbtr & SPR_ITLBTR_UXE))
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except_handle(EXCEPT_IPF, virtaddr);
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except_handle(EXCEPT_IPF, virtaddr);
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}
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}
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ppn = cpu_state.sprs[SPR_ITLBTR_BASE(way) + set] / config.immu.pagesize;
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TRACE("Returning physical address %"PRIxADDR"\n",
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return (ppn * config.immu.pagesize) + (virtaddr % config.immu.pagesize);
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(*itlbtr & SPR_ITLBTR_PPN) | (virtaddr &
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(config.immu.page_offset_mask)));
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return (*itlbtr & SPR_ITLBTR_PPN) | (virtaddr &
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(config.immu.page_offset_mask));
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}
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}
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else { /* No, we didn't. */
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/* No, we didn't. */
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immu_stats.fetch_tlbmiss++;
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immu_stats.fetch_tlbmiss++;
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#if 0
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#if 0
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for (i = 0; i < config.immu.nways; i++)
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for (i = 0; i < config.immu.nways; i++)
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if (((cpu_state.sprs[SPR_ITLBMR_BASE(i) + set] & SPR_ITLBMR_LRU) >> 6) < minlru)
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if (((cpu_state.sprs[SPR_ITLBMR_BASE(i) + set] & SPR_ITLBMR_LRU) >> 6) < minlru)
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minway = i;
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minway = i;
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| Line 132... |
Line 165... |
runtime.sim.mem_cycles += config.immu.missdelay;
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runtime.sim.mem_cycles += config.immu.missdelay;
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except_handle(EXCEPT_ITLBMISS, virtaddr);
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except_handle(EXCEPT_ITLBMISS, virtaddr);
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return 0;
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return 0;
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}
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}
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}
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/* DESC: try to find EA -> PA transaltion without changing
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/* DESC: try to find EA -> PA transaltion without changing
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* any of precessor states. if this is not passible gives up
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* any of precessor states. if this is not passible gives up
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* (without triggering exceptions).
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* (without triggering exceptions).
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*
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*
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| Line 146... |
Line 178... |
* else - appropriate PA (note it IMMU is not present
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* else - appropriate PA (note it IMMU is not present
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* PA === EA)
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* PA === EA)
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*/
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*/
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oraddr_t peek_into_itlb(oraddr_t virtaddr)
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oraddr_t peek_into_itlb(oraddr_t virtaddr)
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{
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{
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int set, way = -1;
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uorreg_t *itlbmr;
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int i;
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uorreg_t *itlbtr;
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oraddr_t tagaddr;
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uorreg_t *itlbmr_lru;
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oraddr_t vpn, ppn;
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if (!(cpu_state.sprs[SPR_SR] & SPR_SR_IME) ||
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if (!(cpu_state.sprs[SPR_SR] & SPR_SR_IME) ||
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!(cpu_state.sprs[SPR_UPR] & SPR_UPR_IMP)) {
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!(cpu_state.sprs[SPR_UPR] & SPR_UPR_IMP)) {
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return(virtaddr);
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return(virtaddr);
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}
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}
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/* Which set to check out? */
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itlbmr = immu_find_tlbmr(virtaddr, &itlbmr_lru);
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set = (virtaddr / config.immu.pagesize) % config.immu.nsets;
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tagaddr = (virtaddr / config.immu.pagesize) / config.immu.nsets;
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vpn = virtaddr / (config.immu.pagesize * config.immu.nsets);
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/* Scan all ways and try to find a matching way. */
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for (i = 0; i < config.immu.nways; i++)
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if (((cpu_state.sprs[SPR_ITLBMR_BASE(i) + set] / (config.immu.pagesize * config.immu.nsets)) == vpn) &&
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(cpu_state.sprs[SPR_ITLBMR_BASE(i) + set] & SPR_ITLBMR_V))
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way = i;
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/* Did we find our tlb entry? */
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/* Did we find our tlb entry? */
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if (way >= 0) { /* Yes, we did. */
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if(itlbmr) { /* Yes, we did. */
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itlbtr = itlbmr + 128;
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/* Test for page fault */
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/* Test for page fault */
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if (cpu_state.sprs[SPR_SR] & SPR_SR_SM) {
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if (cpu_state.sprs[SPR_SR] & SPR_SR_SM) {
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if (!(cpu_state.sprs[SPR_ITLBTR_BASE(way) + set] & SPR_ITLBTR_SXE)) {
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if (!(*itlbtr & SPR_ITLBTR_SXE)) {
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/* no luck, giving up */
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/* no luck, giving up */
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return(0);
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return(0);
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}
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}
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} else {
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} else {
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if (!(cpu_state.sprs[SPR_ITLBTR_BASE(way) + set] & SPR_ITLBTR_UXE)) {
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if (!(*itlbtr & SPR_ITLBTR_UXE)) {
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/* no luck, giving up */
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/* no luck, giving up */
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return(0);
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return(0);
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}
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}
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}
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}
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ppn = cpu_state.sprs[SPR_ITLBTR_BASE(way) + set] / config.immu.pagesize;
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return (*itlbtr & SPR_ITLBTR_PPN) | (virtaddr &
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return (ppn * config.immu.pagesize) + (virtaddr % config.immu.pagesize);
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(config.immu.page_offset_mask));
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}
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else {
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return(0);
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}
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}
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ERR("should never have happened\n");
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return(0);
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return(0);
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}
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}
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oraddr_t immu_translate(oraddr_t virtaddr)
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{
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oraddr_t phyaddr = immu_simulate_tlb(virtaddr);
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/* PRINTF("IMMU translate(%x) = %x\n", virtaddr, phyaddr);*/
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return phyaddr;
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}
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void itlb_info(void)
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void itlb_info(void)
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{
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{
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if (!(cpu_state.sprs[SPR_UPR] & SPR_UPR_IMP)) {
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if (!(cpu_state.sprs[SPR_UPR] & SPR_UPR_IMP)) {
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PRINTF("IMMU not implemented. Set UPR[IMP].\n");
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PRINTF("IMMU not implemented. Set UPR[IMP].\n");
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return;
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return;
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