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[/] [or1k/] [trunk/] [or1ksim/] [support/] [dumpverilog.c] - Diff between revs 1748 and 1751
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| Rev 1748 |
Rev 1751 |
| Line 51... |
Line 51... |
"// Data out is not registered. Address bits specify dw-word (narrowest \n"\
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"// Data out is not registered. Address bits specify dw-word (narrowest \n"\
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"// addressed data is not byte but dw-word !). \n"\
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"// addressed data is not byte but dw-word !). \n"\
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"// There are still some bugs in generated output (dump word aligned regions)\n\n"\
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"// There are still some bugs in generated output (dump word aligned regions)\n\n"\
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"module %s(clk, data, addr, ce, we, disout);\n\n"\
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"module %s(clk, data, addr, ce, we, disout);\n\n"\
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"parameter dw = 32;\n"\
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"parameter dw = 32;\n"\
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"parameter amin = %d;\n\n"\
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"parameter amin = %" PRIdREG ";\n\n"\
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"parameter amax = %d;\n\n"\
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"parameter amax = %" PRIdREG ";\n\n"\
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"input clk;\n"\
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"input clk;\n"\
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"inout [dw-1:0] data;\n"\
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"inout [dw-1:0] data;\n"\
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"input [31:0] addr;\n"\
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"input [31:0] addr;\n"\
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"input ce;\n"\
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"input ce;\n"\
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"input we;\n"\
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"input we;\n"\
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