| Line 39... |
Line 39... |
#define LSR_BREAK (0x10)
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#define LSR_BREAK (0x10)
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#define LSR_TXFE (0x20)
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#define LSR_TXFE (0x20)
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#define LSR_TXE (0x40)
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#define LSR_TXE (0x40)
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#define LSR_ERR (0x80)
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#define LSR_ERR (0x80)
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#define UART_INT_LINE 15 /* To which interrupt is uart connected */
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#define UART_INT_LINE 19 /* To which interrupt is uart connected */
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/* fails if x is false */
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/* fails if x is false */
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#define ASSERT(x) ((x)?1: fail (__FUNCTION__, __LINE__))
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#define ASSERT(x) ((x)?1: fail (__FUNCTION__, __LINE__))
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/* Waits a few cycles that uart can prepare its data */
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/* Waits a few cycles that uart can prepare its data */
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#define WAIT() {asm ("l.nop");asm ("l.nop");asm ("l.nop");asm ("l.nop");}
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#define WAIT() {asm ("l.nop");asm ("l.nop");asm ("l.nop");asm ("l.nop");}
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| Line 74... |
Line 74... |
inline unsigned long getreg (unsigned long addr)
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inline unsigned long getreg (unsigned long addr)
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{
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{
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return *((volatile unsigned char *)addr);
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return *((volatile unsigned char *)addr);
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}
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}
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static volatile int int_cnt = 0;
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static volatile int int_cnt;
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static volatile unsigned int_iir = 0;
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static volatile unsigned int_iir;
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static volatile unsigned int_lsr = 0;
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static volatile unsigned int_lsr;
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static int int_rbr = 0;
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static int int_rbr;
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void interrupt_handler ()
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void interrupt_handler ()
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{
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{
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unsigned x;
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unsigned x;
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printf ("Int\n");
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printf ("Int\n");
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| Line 509... |
Line 509... |
int i;
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int i;
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printf ("interrupt_test\n");
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printf ("interrupt_test\n");
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/* Configure UART for interrupt mode */
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/* Configure UART for interrupt mode */
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ASSERT(getreg (UART_IIR) == 0xc1); /* nothing should be happening */
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ASSERT(getreg (UART_IIR) == 0xc1); /* nothing should be happening */
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setreg (UART_LCR, LCR_DIVL);
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setreg (UART_LCR, LCR_DIVL);
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setreg (UART_DLH, 6 >> 8); /* Set relatively slow speed, so we can hanlde interrupts properly */
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setreg (UART_DLH, 12 >> 8); /* Set relatively slow speed, so we can hanlde interrupts properly */
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setreg (UART_DLL, 6 & 0xff);
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setreg (UART_DLL, 12 & 0xff);
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setreg (UART_LCR, 0x03); /* 8N1 @ 6 */
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setreg (UART_LCR, 0x03); /* 8N1 @ 6 */
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ASSERT (int_cnt == 0); /* We should not have got any interrupts before this test */
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ASSERT (int_cnt == 0); /* We should not have got any interrupts before this test */
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setreg (UART_FCR, 0x01); /* Set trigger level = 1 char, fifo should not be reset */
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setreg (UART_FCR, 0x01); /* Set trigger level = 1 char, fifo should not be reset */
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setreg (UART_IER, 0x07); /* Enable interrupts: line status, THR empty, data ready */
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setreg (UART_IER, 0x07); /* Enable interrupts: line status, THR empty, data ready */
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| Line 750... |
Line 750... |
{
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{
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printf ("line_error_test\n");
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printf ("line_error_test\n");
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/* Test framing error if we change speed */
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/* Test framing error if we change speed */
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setreg (UART_LCR, LCR_DIVL);
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setreg (UART_LCR, LCR_DIVL);
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setreg (UART_DLH, 2 >> 8);
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setreg (UART_DLH, 12 >> 8);
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setreg (UART_DLL, 2 & 0xff);
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setreg (UART_DLL, 12 & 0xff);
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setreg (UART_LCR, 0x03); /* 8N1 @ 2 */
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setreg (UART_LCR, 0x03); /* 8N1 @ 3 */
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MARK();
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MARK();
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send_char ('c');
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send_char ('c');
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ASSERT (int_cnt == 0);
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ASSERT (int_cnt == 0);
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setreg (UART_IER, 0x04); /* Enable interrupts: line status */
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setreg (UART_IER, 0x04); /* Enable interrupts: line status */
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| Line 799... |
Line 799... |
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/* Enable interrupts */
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/* Enable interrupts */
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mtspr (SPR_SR, mfspr(SPR_SR) | SPR_SR_IEE);
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mtspr (SPR_SR, mfspr(SPR_SR) | SPR_SR_IEE);
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mtspr (SPR_PICMR, mfspr(SPR_PICMR) | (0x00000001L << UART_INT_LINE));
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mtspr (SPR_PICMR, mfspr(SPR_PICMR) | (0x00000001L << UART_INT_LINE));
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int_cnt = 0;
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int_iir = 0;
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int_lsr = 0;
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int_rbr = 0;
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register_test ();
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register_test ();
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init_8n1 ();
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init_8n1 ();
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send_recv_test ();
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send_recv_test ();
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break_test ();
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break_test ();
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different_modes_test ();
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different_modes_test ();
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