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[/] [or1k/] [trunk/] [orpmon/] [reset.S] - Diff between revs 858 and 987

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Rev 858 Rev 987
Line 80... Line 80...
        .org 0x500
        .org 0x500
.else
.else
        .org (0x500 - 0x100 + _reset)
        .org (0x500 - 0x100 + _reset)
.endif
.endif
 
 
        l.j     _tick
        l.addi  r1,r1,-128
 
        l.sw    0x4(r1),r2
 
        l.movhi r2,hi(_tick)
 
        l.ori   r2,r2,lo(_tick)
 
        l.jr    r2
        l.nop
        l.nop
 
 
.if IN_FLASH
.if IN_FLASH
        .section .vectors, "ax"
        .section .vectors, "ax"
        .org 0x600
        .org 0x600
.else
.else
        .org (0x600 - 0x100 + _reset)
        .org (0x600 - 0x100 + _reset)
.endif
.endif
 
 
        l.j     _align
        l.addi  r1,r1,-128
 
        l.sw    0x08(r1),r2
 
        l.movhi r2,hi(_align)
 
        l.ori   r2,r2,lo(_align)
 
        l.jr    r2
        l.nop
        l.nop
 
 
.if IN_FLASH
.if IN_FLASH
        .org 0x800
        .org 0x800
.else
.else
        .org (0x800 - 0x100 + _reset)
        .org (0x800 - 0x100 + _reset)
.endif
.endif
 
 
        l.j     _int_wrapper
        l.addi  r1,r1,-128
 
        l.sw    0x4(r1),r2
 
        l.movhi r2,hi(_int_wrapper)
 
        l.ori   r2,r2,lo(_int_wrapper)
 
        l.jr    r2
        l.nop
        l.nop
 
 
        .section .text
        .section .text
_start:
_start:
.if IN_FLASH
.if IN_FLASH
Line 222... Line 234...
        l.movhi r3,hi(MC_BASE_ADDR)
        l.movhi r3,hi(MC_BASE_ADDR)
        l.ori   r3,r3,lo(MC_BASE_ADDR)
        l.ori   r3,r3,lo(MC_BASE_ADDR)
 
 
        l.addi  r4,r3,MC_CSC(0)
        l.addi  r4,r3,MC_CSC(0)
        l.movhi r5,hi(FLASH_BASE_ADDR)
        l.movhi r5,hi(FLASH_BASE_ADDR)
        l.srai  r5,r5,5
        l.srai  r5,r5,6
        l.ori   r5,r5,0x0025
        l.ori   r5,r5,0x0025
        l.sw    0(r4),r5
        l.sw    0(r4),r5
 
 
        l.addi  r4,r3,MC_TMS(0)
        l.addi  r4,r3,MC_TMS(0)
        l.movhi r5,hi(FLASH_TMS_VAL)
        l.movhi r5,hi(FLASH_TMS_VAL)
Line 247... Line 259...
        l.ori   r5,r5,lo(SDRAM_TMS_VAL)
        l.ori   r5,r5,lo(SDRAM_TMS_VAL)
        l.sw    0(r4),r5
        l.sw    0(r4),r5
 
 
        l.addi  r4,r3,MC_CSC(1)
        l.addi  r4,r3,MC_CSC(1)
        l.movhi r5,hi(SDRAM_BASE_ADDR)
        l.movhi r5,hi(SDRAM_BASE_ADDR)
        l.srai  r5,r5,5
        l.srai  r5,r5,6
        l.ori   r5,r5,0x0411
        l.ori   r5,r5,0x0411
        l.sw    0(r4),r5
        l.sw    0(r4),r5
 
 
#ifdef ETH_DATA_BASE
#ifdef ETH_DATA_BASE
        l.addi  r4,r3,MC_CSC(2)
        l.addi  r4,r3,MC_CSC(2)
        l.movhi r5,hi(ETH_DATA_BASE)
        l.movhi r5,hi(ETH_DATA_BASE)
        l.srai  r5,r5,5
        l.srai  r5,r5,6
        l.ori   r5,r5,0x0005
        l.ori   r5,r5,0x0005
        l.sw    0(r4),r5
        l.sw    0(r4),r5
 
 
        l.addi  r4,r3,MC_TMS(2)
        l.addi  r4,r3,MC_TMS(2)
        l.movhi r5,0xffff
        l.movhi r5,0xffff
Line 269... Line 281...
        l.jr    r9
        l.jr    r9
        l.nop
        l.nop
.endif
.endif
 
 
_tick:
_tick:
        l.addi  r1,r1,-128
 
 
 
        l.sw    0x4(r1),r2
 
        l.sw    0x8(r1),r4
        l.sw    0x8(r1),r4
        l.sw    0xc(r1),r5
        l.sw    0xc(r1),r5
        l.sw    0x10(r1),r6
        l.sw    0x10(r1),r6
        l.sw    0x14(r1),r7
        l.sw    0x14(r1),r7
        l.sw    0x18(r1),r8
        l.sw    0x18(r1),r8
Line 344... Line 353...
        l.addi  r1,r1,128
        l.addi  r1,r1,128
        l.rfe
        l.rfe
        l.nop
        l.nop
 
 
_int_wrapper:
_int_wrapper:
        l.addi  r1,r1,-128
 
 
 
        l.sw    0x4(r1),r2
 
        l.sw    0x8(r1),r4
        l.sw    0x8(r1),r4
        l.sw    0xc(r1),r5
        l.sw    0xc(r1),r5
        l.sw    0x10(r1),r6
        l.sw    0x10(r1),r6
        l.sw    0x14(r1),r7
        l.sw    0x14(r1),r7
        l.sw    0x18(r1),r8
        l.sw    0x18(r1),r8
Line 420... Line 426...
        l.addi  r1,r1,128
        l.addi  r1,r1,128
        l.rfe
        l.rfe
        l.nop
        l.nop
 
 
_align:
_align:
        l.addi  r1,r1,-128
 
        l.sw    0x08(r1),r2
 
        l.sw    0x0c(r1),r3
        l.sw    0x0c(r1),r3
        l.sw    0x10(r1),r4
        l.sw    0x10(r1),r4
        l.sw    0x14(r1),r5
        l.sw    0x14(r1),r5
        l.sw    0x18(r1),r6
        l.sw    0x18(r1),r6
        l.sw    0x1c(r1),r7
        l.sw    0x1c(r1),r7

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