URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] [uclinux/] [uClinux-2.0.x/] [drivers/] [net/] [open_eth.c] - Diff between revs 827 and 831

Rev 827	Rev 831
Line 46...	Line 46...
`#define DEBUG 1`	`#define DEBUG 1`

`#define RXBUFF_PREALLOC 1`	`#define RXBUFF_PREALLOC 1`
`#define TXBUFF_PREALLOC 1`	`#define TXBUFF_PREALLOC 1`

`#define SRAM_BUFF 1`	`//#define SRAM_BUFF 1`
`#define SRAM_BUFF_BASE (FBMEM_BASE_ADD + 0x80000)`	`//#define SRAM_BUFF_BASE (FBMEM_BASE_ADD + 0x80000)`

`/* The transmitter timeout`	`/* The transmitter timeout`
`*/`	`*/`
`#define TX_TIMEOUT (2*HZ)`	`#define TX_TIMEOUT (2*HZ)`

Line 728...	Line 728...
`regs->ctrlmoder = OETH_CTRLMODER_TXFLOW \| OETH_CTRLMODER_RXFLOW;`	`regs->ctrlmoder = OETH_CTRLMODER_TXFLOW \| OETH_CTRLMODER_RXFLOW;`
`#else`	`#else`
`regs->ctrlmoder = 0;`	`regs->ctrlmoder = 0;`
`#endif`	`#endif`

	`/* Set PHY to show Tx status, Rx status and Link status */`
	`regs->miiaddress = 20<<8;`
	`regs->miitx_data = 0x1422;`
	`regs->miicommand = OETH_MIICOMMAND_WCTRLDATA;`

`#ifdef TXBUFF_PREALLOC`	`#ifdef TXBUFF_PREALLOC`

`/* Initialize TXBDs.`	`/* Initialize TXBDs.`
`*/`	`*/`
`for(i = 0, k = 0; i < OETH_TX_BUFF_PAGE_NUM; i++) {`	`for(i = 0, k = 0; i < OETH_TX_BUFF_PAGE_NUM; i++) {`