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https://opencores.org/ocsvn/or1k/or1k/trunk
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Rev 687 |
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/* Devices base address */
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/* Devices base address */
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#define UART_BASE_ADD 0x9c000000
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#define UART_BASE_ADD 0x9c000000
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#define MC_BASE_ADD 0xa0000000
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#define MC_BASE_ADD 0xa0000000
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#define CRT_BASE_ADD 0xb0000000
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#define CRT_BASE_ADD 0xb0000000
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#define KBD_BASE_ADD 0xb1000000
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/* Define this if you want to use I and/or D cache */
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/* Define this if you want to use I and/or D cache */
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#define ICACHE 0
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#define ICACHE 0
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#define DCACHE 0
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#define DCACHE 0
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