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https://opencores.org/ocsvn/or1k_old/or1k_old/trunk
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Rev 972 |
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#define SDRAM_BASE_ADDR 0x00000000
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#define SDRAM_BASE_ADDR 0x00000000
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#define SDRAM_TMS_VAL 0x19220057
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#define SDRAM_TMS_VAL 0x19220057
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#define UART_BASE 0x90000000
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#define UART_BASE 0x90000000
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#define UART_IRQ 19
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#define UART_IRQ 2
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#define ETH_BASE 0x92000000
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#define ETH_BASE 0x92000000
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#define ETH_IRQ 15
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#define ETH_IRQ 4
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#define KBD_BASE_ADD 0x94000000
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#define KBD_BASE_ADD 0x94000000
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#define KBD_IRQ 5
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#define KBD_IRQ 5
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#define MC_BASE_ADDR 0x93000000
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#define MC_BASE_ADDR 0x93000000
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#define DMA_BASE 0xb8000000
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#define DMA_BASE 0xb8000000
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