| Line 64... |
Line 64... |
cpu_state.sprs[SPR_TTMR] = 0;
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cpu_state.sprs[SPR_TTMR] = 0;
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tick_count = 0;
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tick_count = 0;
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}
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}
|
|
|
/* Raises a timer exception */
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/* Raises a timer exception */
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void tick_raise_except(void *dat)
|
static void tick_raise_except(void *dat)
|
{
|
{
|
cpu_state.sprs[SPR_TTMR] |= SPR_TTMR_IP;
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cpu_state.sprs[SPR_TTMR] |= SPR_TTMR_IP;
|
|
|
/* Reschedule unconditionally, since we have to raise the exception until
|
/* Reschedule unconditionally, since we have to raise the exception until
|
* TTMR_IP has been cleared */
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* TTMR_IP has been cleared */
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| Line 78... |
Line 78... |
if(cpu_state.sprs[SPR_SR] & SPR_SR_TEE)
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if(cpu_state.sprs[SPR_SR] & SPR_SR_TEE)
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except_handle(EXCEPT_TICK, cpu_state.sprs[SPR_EEAR_BASE]);
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except_handle(EXCEPT_TICK, cpu_state.sprs[SPR_EEAR_BASE]);
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}
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}
|
|
|
/* Restarts the tick timer */
|
/* Restarts the tick timer */
|
void tick_restart(void *dat)
|
static void tick_restart(void *dat)
|
{
|
{
|
cpu_state.sprs[SPR_TTCR] = 0;
|
cpu_state.sprs[SPR_TTCR] = 0;
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cycles_start = runtime.sim.cycles;
|
cycles_start = runtime.sim.cycles;
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TRACE("Scheduleing timer restart job for %"PRIdREG"\n",
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TRACE("Scheduleing timer restart job for %"PRIdREG"\n",
|
cpu_state.sprs[SPR_TTMR] & SPR_TTMR_PERIOD);
|
cpu_state.sprs[SPR_TTMR] & SPR_TTMR_PERIOD);
|
SCHED_ADD(tick_restart, NULL, cpu_state.sprs[SPR_TTMR] & SPR_TTMR_PERIOD);
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SCHED_ADD(tick_restart, NULL, cpu_state.sprs[SPR_TTMR] & SPR_TTMR_PERIOD);
|
}
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}
|
|
|
/* Stops the timer */
|
/* Stops the timer */
|
void tick_one_shot(void *dat)
|
static void tick_one_shot(void *dat)
|
{
|
{
|
TRACE("Stopping one-shot timer\n");
|
TRACE("Stopping one-shot timer\n");
|
cpu_state.sprs[SPR_TTCR] = cpu_state.sprs[SPR_TTMR] & SPR_TTMR_PERIOD;
|
cpu_state.sprs[SPR_TTCR] = cpu_state.sprs[SPR_TTMR] & SPR_TTMR_PERIOD;
|
tick_count = 0;
|
tick_count = 0;
|
}
|
}
|
