| Line 56... |
Line 56... |
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/* Handles the reporting of an interrupt if it had to be delayed */
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/* Handles the reporting of an interrupt if it had to be delayed */
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void pic_clock(void *dat)
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void pic_clock(void *dat)
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{
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{
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/* Don't do anything if interrupts not currently enabled */
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/* Don't do anything if interrupts not currently enabled */
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if(testsprbits (SPR_SR, SPR_SR_IEE))
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if(testsprbits (SPR_SR, SPR_SR_IEE)) {
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TRACE("Delivering interrupt on cycle %lli\n", runtime.sim.cycles);
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except_handle(EXCEPT_INT, mfspr(SPR_EEAR_BASE));
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except_handle(EXCEPT_INT, mfspr(SPR_EEAR_BASE));
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else
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} else if(testsprbits (SPR_PICSR, (int)dat))
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SCHED_ADD(pic_clock, NULL, 1);
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/* Reschedule only if the interrupt hasn't been cleared */
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SCHED_ADD(pic_clock, dat, 1);
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}
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}
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/* WARNING: Don't eaven try and call this function *during* a simulated
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/* WARNING: Don't eaven try and call this function *during* a simulated
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* instruction!! (as in during a read_mem or write_mem callback). except_handle
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* instruction!! (as in during a read_mem or write_mem callback). except_handle
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* assumes that this is the case, it breaks otherwise. */
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* assumes that this is the case, it breaks otherwise. */
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| Line 83... |
Line 85... |
if (testsprbits (SPR_SR, SPR_SR_IEE)) {
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if (testsprbits (SPR_SR, SPR_SR_IEE)) {
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TRACE("Delivering interrupt on cycle %lli\n", runtime.sim.cycles);
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TRACE("Delivering interrupt on cycle %lli\n", runtime.sim.cycles);
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except_handle(EXCEPT_INT, mfspr(SPR_EEAR_BASE));
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except_handle(EXCEPT_INT, mfspr(SPR_EEAR_BASE));
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} else
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} else
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/* Interrupts not currently enabled, retry next clock cycle */
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/* Interrupts not currently enabled, retry next clock cycle */
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SCHED_ADD(pic_clock, NULL, 1);
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SCHED_ADD(pic_clock, (void *)line, 1);
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}
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}
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}
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}
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No newline at end of file
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No newline at end of file
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