URL https://opencores.org/ocsvn/or1k_old/or1k_old/trunk

Subversion Repositories or1k_old

[/] [or1k_old/] [trunk/] [mp3/] [syn/] [design_compiler/] [bin/] [top.scr] - Diff between revs 268 and 637

Rev 268	Rev 637
Line 1...	Line 1...
`/*`	`/*`
`* User defines for synthesizing RTC IP core`	`* User defines for synthesizing RTC IP core`
`*`	`*`
`*/`	`*/`
`TOPLEVEL = xfpga_top`	`TOPLEVEL = or1200_top`
`include ../bin/select_tech.inc`	`include ../bin/select_tech.inc`
`CLK = clk`	`CLK = clk_i`
`RST = rstn`	`RST = rst_i`
`CLK_PERIOD = 5 /* 200 MHz */`	`CLK_PERIOD = 10 /* 250 MHz */`
`MAX_AREA = 0 /* Push hard */`	`MAX_AREA = 0 /* Push hard */`
`DO_UNGROUP = yes /* yes, no */`	`DO_UNGROUP = no /* yes, no */`
`DO_VERIFY = yes /* yes, no */`	`DO_VERIFY = no /* yes, no */`

	`get_license DC-Ultra-Features`
	`get_license DC-Ultra-Opt`
	`get_license BOA-BRT`

`/* Starting timestamp */`	`/* Starting timestamp */`
`sh date`	`sh date`

`/* Set some basic variables related to environment */`	`/* Set some basic variables related to environment */`
Line 44...	Line 48...

`/* Lets do basic synthesis */`	`/* Lets do basic synthesis */`
`if (DO_UNGROUP == "yes") {`	`if (DO_UNGROUP == "yes") {`
`ungroup -all`	`ungroup -all`
`}`	`}`
`compile -boundary_optimization -map_effort low`	`/* set_ultra_optimization -f`
	`compile -boundary_optimization -map_effort medium -ungroup_all`
	`*/`
	`compile -map_effort low`

`/* Dump gate-level from incremental synthesis */`	`/* Dump gate-level from incremental synthesis */`
`include ../bin/save_design.inc`	`include ../bin/save_design.inc`

`/* Generate reports for incremental synthesis */`	`/* Generate reports for incremental synthesis */`