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[/] [or1k_old/] [trunk/] [or1200/] [rtl/] [verilog/] [or1200_dmmu_top.v] - Diff between revs 504 and 562

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Rev 504 Rev 562
Line 42... Line 42...
//////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////
//
//
// CVS Revision History
// CVS Revision History
//
//
// $Log: not supported by cvs2svn $
// $Log: not supported by cvs2svn $
 
// Revision 1.1  2002/01/03 08:16:15  lampret
 
// New prefixes for RTL files, prefixed module names. Updated cache controllers and MMUs.
 
//
// Revision 1.6  2001/10/21 17:57:16  lampret
// Revision 1.6  2001/10/21 17:57:16  lampret
// Removed params from generic_XX.v. Added translate_off/on in sprs.v and id.v. Removed spr_addr from dc.v and ic.v. Fixed CR+LF.
// Removed params from generic_XX.v. Added translate_off/on in sprs.v and id.v. Removed spr_addr from dc.v and ic.v. Fixed CR+LF.
//
//
// Revision 1.5  2001/10/14 13:12:09  lampret
// Revision 1.5  2001/10/14 13:12:09  lampret
// MP3 version.
// MP3 version.
Line 227... Line 230...
assign dcdmmu_stb_o = (!dc_en & dmmu_en) ? ~(miss | fault) & dcpu_stb_dlyd : (miss | fault) ? 1'b0 : dcpu_stb_i;
assign dcdmmu_stb_o = (!dc_en & dmmu_en) ? ~(miss | fault) & dcpu_stb_dlyd : (miss | fault) ? 1'b0 : dcpu_stb_i;
 
 
//
//
// Cache Inhibit
// Cache Inhibit
//
//
assign dcdmmu_ci_o = dmmu_en ? dtlb_done & dtlb_ci : !dcdmmu_adr_o[30];
assign dcdmmu_ci_o = dmmu_en ? dtlb_done & dtlb_ci : 1'b0;
 
 
//
//
// Physical address is either translated virtual address or
// Physical address is either translated virtual address or
// simply equal when DMMU is disabled
// simply equal when DMMU is disabled
//
//

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