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#ifndef _BOARD_H_
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#ifndef _BOARD_H_
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#define _BOARD_H_
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#define _BOARD_H_
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#ifdef XESS
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#define MC_ENABLED 0
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#else
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#define MC_ENABLED 1
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#define MC_ENABLED 1
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#endif
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#define IC_ENABLE 0
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#define IC_ENABLE 0
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#define IC_SIZE 8192
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#define IC_SIZE 8192
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#define DC_ENABLE 0
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#define DC_ENABLE 0
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#define DC_SIZE 8192
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#define DC_SIZE 8192
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#define MC_CSR_VAL 0x0B000300
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#define MC_CSR_VAL 0x0B000300
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#define MC_MASK_VAL 0x000000e0
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#define MC_MASK_VAL 0x000003f0
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#define FLASH_BASE_ADDR 0x04000000
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#define FLASH_BASE_ADDR 0xf0000000
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#define FLASH_SIZE 0x02000000
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#define FLASH_TMS_VAL 0x00000103
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#define FLASH_BLOCK_SIZE 0x20000
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#define FLASH_TMS_VAL 0x00102102
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#define SDRAM_BASE_ADDR 0x00000000
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#define SDRAM_BASE_ADDR 0x00000000
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#define SDRAM_TMS_VAL 0x07248230
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#define SDRAM_TMS_VAL 0x19220057
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#define FLASH_BLOCK_SIZE 0x00020000
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#define FLASH_SIZE 0x02000000
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#ifdef XESS
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#define IN_CLK 10000000
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#else
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#define IN_CLK 25000000
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#define IN_CLK 25000000
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#endif
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#define UART_BAUD_RATE 9600
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#define TICKS_PER_SEC 100
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#define TICKS_PER_SEC 100
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#define STACK_SIZE 0x10000
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#define STACK_SIZE 0x10000
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#ifdef XESS
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#define UART_BAUD_RATE 19200
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#else
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#define UART_BAUD_RATE 9600 /* 115200 */
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#endif
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#define UART_BASE 0x90000000
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#define UART_BASE 0x90000000
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#define UART_IRQ 19
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#define UART_IRQ 2
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#ifdef XESS
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#define ETH_BASE 0x92000000
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#define ETH_BASE 0x92000000
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#else
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#define ETH_IRQ 4
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#define ETH_BASE 0xD0000000
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#define MC_BASE_ADDR 0x93000000
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#endif
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#define SPI_BASE 0xb9000000
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#define ETH_IRQ 15
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#define CRT_BASE_ADDR 0x97000000
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#define MC_BASE_ADDR 0x60000000
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#define ATA_BASE_ADDR 0x9e000000
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#define SPI_BASE 0xa0000000
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#define KBD_BASE_ADD 0x94000000
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#define KBD_IRQ 5
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#ifdef XESS
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#define ETH_DATA_BASE 0x00100000 /* Address for ETH_DATA */
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#else
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#define ETH_DATA_BASE 0xa8000000 /* Address for ETH_DATA */
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#define ETH_DATA_BASE 0xa8000000 /* Address for ETH_DATA */
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#endif
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#define BOARD_DEF_IP 0x0a010185
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#define BOARD_DEF_IP 0x0a010185
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#define BOARD_DEF_MASK 0xff000000
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#define BOARD_DEF_MASK 0xff000000
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#define BOARD_DEF_GW 0x0a010101
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#define BOARD_DEF_GW 0x0a010101
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#define ETH_MACADDR3 0x56
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#define ETH_MACADDR3 0x56
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#define ETH_MACADDR4 0x78
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#define ETH_MACADDR4 0x78
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#define ETH_MACADDR5 0x9a
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#define ETH_MACADDR5 0x9a
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#define CRT_ENABLED 1
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#define CRT_ENABLED 1
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#define CRT_BASE_ADDR 0xc0000000
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#define FB_BASE_ADDR 0xa8000000
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#define FB_BASE_ADDR 0xa8000000
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#define ATA_BASE_ADDR 0xc8000000
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/* Whether online help is available -- saves space */
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/* Whether online help is available -- saves space */
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#define HELP_ENABLED 1
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#define HELP_ENABLED 1
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/* Whether self check is enabled */
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/* Whether self check is enabled */
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#define SELF_CHECK 0
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#define SELF_CHECK 0
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/* Whether we have keyboard suppport */
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/* Whether we have keyboard suppport */
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#define KBD_ENABLED 1
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#define KBD_ENABLED 1
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/* Keyboard base address */
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#define KBD_BASE_ADD 0x98000000
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#define KBD_IRQ 12
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/* Keyboard buffer size */
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/* Keyboard buffer size */
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#define KBDBUF_SIZE 256
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#define KBDBUF_SIZE 256
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/* Which console is used (CT_NONE, CT_SIM, CT_UART, CT_CRT) */
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/* Which console is used (CT_NONE, CT_SIM, CT_UART, CT_CRT) */
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#define CONSOLE_TYPE CT_UART
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#define CONSOLE_TYPE CT_UART
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