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[/] [or1k_old/] [trunk/] [orpmon/] [reset.S] - Diff between revs 829 and 833

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Rev 829 Rev 833
Line 9... Line 9...
        .extern _src_beg
        .extern _src_beg
        .extern _dst_beg
        .extern _dst_beg
        .extern _dst_end
        .extern _dst_end
        .extern _c_reset
        .extern _c_reset
        .extern _int_main
        .extern _int_main
 
        .extern _tick_interrupt
        .extern _crc32
        .extern _crc32
 
 
        /* Used by global.src_addr for default value */
        /* Used by global.src_addr for default value */
        .extern _src_addr
        .extern _src_addr
 
 
Line 69... Line 70...
        l.movhi r3,hi(MC_BASE_ADDR)
        l.movhi r3,hi(MC_BASE_ADDR)
        l.ori   r3,r3,MC_BA_MASK
        l.ori   r3,r3,MC_BA_MASK
        l.addi  r5,r0,0x00
        l.addi  r5,r0,0x00
        l.sw    0(r3),r5
        l.sw    0(r3),r5
.endif
.endif
        l.movhi r3,hi(_start1)
        l.movhi r3,hi(_start)
        l.ori   r3,r3,lo(_start1)
        l.ori   r3,r3,lo(_start)
        l.jr    r3
        l.jr    r3
        l.nop
        l.nop
 
 
.if IN_FLASH
.if IN_FLASH
        .section .vectors, "ax"
        .section .vectors, "ax"
 
        .org 0x500
 
.else
 
        .org (0x500 - 0x100 + _reset)
 
.endif
 
 
 
        l.j     _tick
 
        l.nop
 
 
 
.if IN_FLASH
 
        .section .vectors, "ax"
        .org 0x600
        .org 0x600
.else
.else
        .org (0x600 - 0x100 + _reset)
        .org (0x600 - 0x100 + _reset)
.endif
.endif
 
 
Line 94... Line 105...
 
 
        l.j     _int_wrapper
        l.j     _int_wrapper
        l.nop
        l.nop
 
 
        .section .text
        .section .text
        l.nop
_start:
_start1:
 
        l.jal   _putc
 
.if IN_FLASH
.if IN_FLASH
        l.jal   _init_mc
        l.jal   _init_mc
        l.nop
        l.nop
 
 
        /* Wait for SDRAM */
        /* Wait for SDRAM */
        l.addi  r3,r0,0x0000  /* igor zmanjsal iz 0x7fff na 0x0000 */
        l.addi  r3,r0,0x1000
1:      l.sfeqi r3,0
1:      l.sfeqi r3,0
        l.bnf   1b
        l.bnf   1b
        l.addi  r3,r3,-1
        l.addi  r3,r3,-1
.endif
.endif
        /* Copy form flash to sram */
        /* Copy form flash to sram */
Line 244... Line 253...
        l.movhi r5,hi(SDRAM_BASE_ADDR)
        l.movhi r5,hi(SDRAM_BASE_ADDR)
        l.srai  r5,r5,5
        l.srai  r5,r5,5
        l.ori   r5,r5,0x0411
        l.ori   r5,r5,0x0411
        l.sw    0(r4),r5
        l.sw    0(r4),r5
 
 
 
#ifdef ETH_DATA_BASE
 
        l.addi  r4,r3,MC_CSC(2)
 
        l.movhi r5,hi(ETH_DATA_BASE)
 
        l.srai  r5,r5,5
 
        l.ori   r5,r5,0x0005
 
        l.sw    0(r4),r5
 
 
 
        l.addi  r4,r3,MC_TMS(2)
 
        l.movhi r5,0xffff
 
        l.ori   r5,r5,0xffff
 
        l.sw    0(r4),r5
 
#endif
 
 
        l.jr    r9
        l.jr    r9
        l.nop
        l.nop
.endif
.endif
 
 
 
_tick:
 
        l.addi  r1,r1,-128
 
 
 
        l.sw    0x4(r1),r2
 
        l.sw    0x8(r1),r4
 
        l.sw    0xc(r1),r5
 
        l.sw    0x10(r1),r6
 
        l.sw    0x14(r1),r7
 
        l.sw    0x18(r1),r8
 
        l.sw    0x1c(r1),r9
 
        l.sw    0x20(r1),r10
 
        l.sw    0x24(r1),r11
 
        l.sw    0x28(r1),r12
 
        l.sw    0x2c(r1),r13
 
        l.sw    0x30(r1),r14
 
        l.sw    0x34(r1),r15
 
        l.sw    0x38(r1),r16
 
        l.sw    0x3c(r1),r17
 
        l.sw    0x40(r1),r18
 
        l.sw    0x44(r1),r19
 
        l.sw    0x48(r1),r20
 
        l.sw    0x4c(r1),r21
 
        l.sw    0x50(r1),r22
 
        l.sw    0x54(r1),r23
 
        l.sw    0x58(r1),r24
 
        l.sw    0x5c(r1),r25
 
        l.sw    0x60(r1),r26
 
        l.sw    0x64(r1),r27
 
        l.sw    0x68(r1),r28
 
        l.sw    0x6c(r1),r29
 
        l.sw    0x70(r1),r30
 
        l.sw    0x74(r1),r31
 
        l.sw    0x78(r1),r3
 
 
 
        l.movhi r3,hi(_tick_interrupt)
 
        l.ori   r3,r3,lo(_tick_interrupt)
 
        l.jalr  r3
 
        l.nop
 
 
 
        l.lwz   r2,0x4(r1)
 
        l.lwz   r4,0x8(r1)
 
        l.lwz   r5,0xc(r1)
 
        l.lwz   r6,0x10(r1)
 
        l.lwz   r7,0x14(r1)
 
        l.lwz   r8,0x18(r1)
 
        l.lwz   r9,0x1c(r1)
 
        l.lwz   r10,0x20(r1)
 
        l.lwz   r11,0x24(r1)
 
        l.lwz   r12,0x28(r1)
 
        l.lwz   r13,0x2c(r1)
 
        l.lwz   r14,0x30(r1)
 
        l.lwz   r15,0x34(r1)
 
        l.lwz   r16,0x38(r1)
 
        l.lwz   r17,0x3c(r1)
 
        l.lwz   r18,0x40(r1)
 
        l.lwz   r19,0x44(r1)
 
        l.lwz   r20,0x48(r1)
 
        l.lwz   r21,0x4c(r1)
 
        l.lwz   r22,0x50(r1)
 
        l.lwz   r23,0x54(r1)
 
        l.lwz   r24,0x58(r1)
 
        l.lwz   r25,0x5c(r1)
 
        l.lwz   r26,0x60(r1)
 
        l.lwz   r27,0x64(r1)
 
        l.lwz   r28,0x68(r1)
 
        l.lwz   r29,0x6c(r1)
 
        l.lwz   r30,0x70(r1)
 
        l.mfspr r31,r0,0x40
 
        l.lwz   r31,0x74(r1)
 
        l.lwz   r3,0x78(r1)
 
 
 
        l.addi  r1,r1,128
 
        l.rfe
 
        l.nop
 
 
_int_wrapper:
_int_wrapper:
        l.addi  r1,r1,-128
        l.addi  r1,r1,-128
 
 
        l.sw    0x4(r1),r2
        l.sw    0x4(r1),r2
        l.sw    0x8(r1),r4
        l.sw    0x8(r1),r4
Line 316... Line 413...
        l.lwz   r27,0x64(r1)
        l.lwz   r27,0x64(r1)
        l.lwz   r28,0x68(r1)
        l.lwz   r28,0x68(r1)
        l.lwz   r29,0x6c(r1)
        l.lwz   r29,0x6c(r1)
        l.lwz   r30,0x70(r1)
        l.lwz   r30,0x70(r1)
        l.lwz   r31,0x74(r1)
        l.lwz   r31,0x74(r1)
#        l.lwz   r3,0x78(r1)
        l.lwz   r3,0x78(r1)
 
 
        l.mtspr r0,r0,SPR_PICSR
        l.mtspr r0,r0,SPR_PICSR
 
 
        l.mfspr r3,r0,SPR_ESR_BASE
 
        l.ori   r3,r3,SPR_SR_IEE
 
        l.mtspr r0,r3,SPR_ESR_BASE
 
 
 
        l.lwz   r3,0x78(r1)
 
 
 
        l.addi  r1,r1,128
        l.addi  r1,r1,128
        l.rfe
        l.rfe
        l.nop
        l.nop
 
 
_align:
_align:
Line 485... Line 576...
        l.srli  r4,r3,9
        l.srli  r4,r3,9
        l.andi  r4,r4,0x7c
        l.andi  r4,r4,0x7c
        l.add r4,r4,r1
        l.add r4,r4,r1
        l.lwz r5,0(r4)
        l.lwz r5,0(r4)
        l.sb  1(r2),r5
        l.sb  1(r2),r5
        l.slli  r5,r5,8
        l.srli  r5,r5,8
        l.j align_end
        l.j align_end
        l.sb  0(r2),r5
        l.sb  0(r2),r5
 
 
sw:
sw:
        l.srli  r4,r3,9
        l.srli  r4,r3,9
        l.andi  r4,r4,0x7c
        l.andi  r4,r4,0x7c
        l.add r4,r4,r1
        l.add r4,r4,r1
        l.lwz r5,0(r4)
        l.lwz r5,0(r4)
        l.sb  3(r2),r5
        l.sb  3(r2),r5
        l.slli  r5,r5,8
        l.srli  r5,r5,8
        l.sb  2(r2),r5
        l.sb  2(r2),r5
        l.slli  r5,r5,8
        l.srli  r5,r5,8
        l.sb  1(r2),r5
        l.sb  1(r2),r5
        l.slli  r5,r5,8
        l.srli  r5,r5,8
        l.j align_end
        l.j align_end
        l.sb  0(r2),r5
        l.sb  0(r2),r5
 
 
align_end:
align_end:
        l.lwz   r2,0x08(r1)
        l.lwz   r2,0x08(r1)
Line 533... Line 624...
        l.lwz   r26,0x68(r1)
        l.lwz   r26,0x68(r1)
        l.lwz   r27,0x6c(r1)
        l.lwz   r27,0x6c(r1)
        l.lwz   r28,0x70(r1)
        l.lwz   r28,0x70(r1)
        l.lwz   r29,0x74(r1)
        l.lwz   r29,0x74(r1)
        l.lwz   r30,0x78(r1)
        l.lwz   r30,0x78(r1)
 
        l.mfspr r31,r0,0x40
        l.lwz   r31,0x7c(r1)
        l.lwz   r31,0x7c(r1)
        l.addi  r1,r1,128
        l.addi  r1,r1,128
        l.rfe
        l.rfe
 
 
        .section .text
        .section .text

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