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[/] [or1k_old/] [trunk/] [orpmon/] [sim.cfg] - Diff between revs 881 and 987

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Rev 881	Rev 987
Line 107...	Line 107...

`nmemories = 3`	`nmemories = 3`
`device 0`	`device 0`
`name = "FLASH"`	`name = "FLASH"`
`ce = 0`	`ce = 0`
`baseaddr = 0x04000000`	`baseaddr = 0xf0000000`
`size = 0x00800000`	`size = 0x00800000`
`delayr = 10`	`delayr = 10`
`delayw = -1`	`delayw = -1`
`enddevice`	`enddevice`

Line 571...	Line 571...
`Power On Configuration register`	`Power On Configuration register`
`*/`	`*/`

`section mc`	`section mc`
`enabled = 1`	`enabled = 1`
`baseaddr = 0x60000000`	`baseaddr = 0x93000000`
`POC = 0x00000008 /* Power on configuration register */`	`POC = 0x00000008 /* Power on configuration register */`
`end`	`end`


`/* UART SECTION`	`/* UART SECTION`
Line 613...	Line 613...
`section uart`	`section uart`
`nuarts = 1`	`nuarts = 1`

`device 0`	`device 0`
`baseaddr = 0x90000000`	`baseaddr = 0x90000000`
`irq = 19`	`irq = 2`
`rxfile = "uart0.rx"`	`rxfile = "uart0.rx"`
`txfile = "uart0.tx"`	`txfile = "uart0.tx"`
`jitter = -1 /* async behaviour */`	`jitter = -1 /* async behaviour */`
`16550 = 1`	`16550 = 1`
`enddevice`	`enddevice`
Line 646...	Line 646...
`section dma`	`section dma`
`ndmas = 0`	`ndmas = 0`

`/*`	`/*`
`device 0`	`device 0`
`baseaddr = 0xa0000000`	`baseaddr = 0x9a000000`
`irq = 4`	`irq = 11`
`enddevice`	`enddevice`
`*/`	`*/`
`end`	`end`


Line 697...	Line 697...

`section ethernet`	`section ethernet`
`nethernets = 1`	`nethernets = 1`

`device 0`	`device 0`
`baseaddr = 0xd0000000`	`baseaddr = 0x92000000`
`dma = 0`	`dma = 0`
`irq = 15`	`irq = 4`
`rtx_type = 1`	`rtx_type = 1`
`tx_channel = 0`	`tx_channel = 0`
`rx_channel = 1`	`rx_channel = 1`
`rxfile = "eth0.rx"`	`rxfile = "eth0.rx"`
`txfile = "eth0.tx"`	`txfile = "eth0.tx"`
Line 734...	Line 734...

`section gpio`	`section gpio`
`ngpios = 1`	`ngpios = 1`

`device 0`	`device 0`
`baseaddr = 0xA1000000`	`baseaddr = 0x91000000`
`irq = 23`	`irq = 3`
`base_vapi_id = 0x0200`	`base_vapi_id = 0x0200`
`enddevice`	`enddevice`
`end`	`end`

`/* VGA SECTION`	`/* VGA SECTION`
Line 765...	Line 765...

`section vga`	`section vga`
`nvgas = 1`	`nvgas = 1`

`device 0`	`device 0`
`baseaddr = 0xb0000000`	`baseaddr = 0x97100000`
`irq = 20`	`irq = 8`
`refresh_rate = 100000`	`refresh_rate = 100000`
`filename = "primary"`	`filename = "primary"`
`enddevice`	`enddevice`
`end`	`end`

Line 812...	Line 812...
`template name for generated names (e.g. "primary" produces "primary0023.bmp")`	`template name for generated names (e.g. "primary" produces "primary0023.bmp")`
`*/`	`*/`

`section fb`	`section fb`
`enabled = 1`	`enabled = 1`
`baseaddr = 0xc0000000`	`baseaddr = 0x97000000`
`refresh_rate = 1000000`	`refresh_rate = 1000000`
`filename = "primary"`	`filename = "primary"`
`end`	`end`


Line 834...	Line 834...
`filename, where to read data from`	`filename, where to read data from`
`*/`	`*/`

`section kbd`	`section kbd`
`enabled = 1`	`enabled = 1`
`irq = 12`	`irq = 5`
`baseaddr = 0x98000000`	`baseaddr = 0x94000000`
`rxfile = "kbd.rx"`	`rxfile = "kbd.rx"`
`end`	`end`


`/* ATA SECTION`	`/* ATA SECTION`
Line 888...	Line 888...

`section ata`	`section ata`
`natas = 1`	`natas = 1`

`device 0`	`device 0`
`baseaddr = 0xc8000000`	`baseaddr = 0x9e000000`
`irq = 21`	`irq = 15`

`dev_type0 = 1`	`dev_type0 = 1`
`dev_file0 = "/tmp/sim_atadev0"`	`dev_file0 = "/tmp/sim_atadev0"`
`dev_size0 = 1`	`dev_size0 = 1`
`dev_packet0 = 0`	`dev_packet0 = 0`

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[/] [or1k_old/] [trunk/] [orpmon/] [sim.cfg] - Diff between revs 881 and 987