URL https://opencores.org/ocsvn/or1k_soc_on_altera_embedded_dev_kit/or1k_soc_on_altera_embedded_dev_kit/trunk

Subversion Repositories or1k_soc_on_altera_embedded_dev_kit

[/] [or1k_soc_on_altera_embedded_dev_kit/] [trunk/] [soc/] [sw/] [adv_jtag_bridge/] [or32_selftest.h] - Diff between revs 12 and 21

Rev 12	Rev 21
Line 1...	Line 1...

`#ifndef _JP2_SELFTEST_H_`	`#ifndef _OR32_SELFTEST_H_`
`#define _JP2_SELFTEST_H_`	`#define _OR32_SELFTEST_H_`

`// Static memory controller defines`	`// Static memory controller defines`
`#define MC_BAR_0 0x00`	`#define MC_BAR_0 0x00`
`#define MC_AMR_0 0x04`	`#define MC_AMR_0 0x04`
`#define MC_WTR_0 0x30`	`#define MC_WTR_0 0x30`
Line 72...	Line 72...
`int test_sdram_2(void);`	`int test_sdram_2(void);`
`int test_sram(void);`	`int test_sram(void);`
`int test_or1k_cpu0(void);`	`int test_or1k_cpu0(void);`
`//int test_8051_cpu1(void);`	`//int test_8051_cpu1(void);`

`#endif // _JP2_SELFTEST_H_`	`#endif // _OR32_SELFTEST_H_`


`No newline at end of file`	`No newline at end of file`