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https://opencores.org/ocsvn/pairing/pairing/trunk
[/] [pairing/] [trunk/] [testbench/] [test_f3m_inv.v] - Diff between revs 4 and 7
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| Rev 4 |
Rev 7 |
| Line 7... |
Line 7... |
reg clk;
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reg clk;
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reg reset;
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reg reset;
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// Outputs
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// Outputs
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wire [193:0] C;
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wire [193:0] C;
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wire done;
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// Instantiate the Unit Under Test (UUT)
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// Instantiate the Unit Under Test (UUT)
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f3m_inv uut (
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f3m_inv uut (
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.A(A),
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.A(A),
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.clk(clk),
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.clk(clk),
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.reset(reset),
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.reset(reset),
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.C(C)
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.C(C),
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.done(done)
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);
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);
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always #`CLOCK_PERIOD clk = ~clk;
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always #`CLOCK_PERIOD clk = ~clk;
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initial begin
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initial begin
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Line 33... |
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// Add stimulus here
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// Add stimulus here
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A = 32'b10_01_01_10_01_00; // A = "x";
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A = 32'b10_01_01_10_01_00; // A = "x";
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@(negedge clk); reset = 1;
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@(negedge clk); reset = 1;
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@(negedge clk); reset = 0;
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@(negedge clk); reset = 0;
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$display("Go!");
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#(200*2*`CLOCK_PERIOD);
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#(200*2*`CLOCK_PERIOD);
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if (C != 192'h65450169824811252a919a8a02964184221a1562655252a9) begin $display("Error!"); $finish; end
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if (C != 192'h65450169824811252a919a8a02964184221a1562655252a9) $display("Error!");
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$display("Good!"); $finish;
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$display("Good!"); $finish;
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end
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end
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endmodule
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endmodule
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