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Line 40... |
//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.5 2003/10/17 09:11:52 markom
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// mbist signals updated according to newest convention
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//
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// Revision 1.4 2003/08/14 13:06:03 simons
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// Revision 1.4 2003/08/14 13:06:03 simons
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// synchronizer_flop replaced with pci_synchronizer_flop, artisan ram instance updated.
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// synchronizer_flop replaced with pci_synchronizer_flop, artisan ram instance updated.
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//
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//
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// Revision 1.3 2003/03/26 13:16:18 mihad
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// Revision 1.3 2003/03/26 13:16:18 mihad
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// Added the reset value parameter to the synchronizer flop module.
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// Added the reset value parameter to the synchronizer flop module.
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Line 528... |
// register holding grey coded count of incoming transactions
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// register holding grey coded count of incoming transactions
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always@(posedge wb_clock_in or posedge wbw_clear)
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always@(posedge wb_clock_in or posedge wbw_clear)
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begin
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begin
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if (wbw_clear)
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if (wbw_clear)
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begin
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begin
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inGreyCount <= #`FF_DELAY 0 ;
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inGreyCount <= #3 0 ;
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end
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end
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else
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else
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if (in_count_en)
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if (in_count_en)
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inGreyCount <= #`FF_DELAY inNextGreyCount ;
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inGreyCount <= #3 inNextGreyCount ;
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end
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end
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wire [(WBW_ADDR_LENGTH-2):0] pci_clk_sync_inGreyCount ;
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wire [(WBW_ADDR_LENGTH-2):0] pci_clk_sync_inGreyCount ;
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reg [(WBW_ADDR_LENGTH-2):0] pci_clk_inGreyCount ;
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reg [(WBW_ADDR_LENGTH-2):0] pci_clk_inGreyCount ;
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pci_synchronizer_flop #((WBW_ADDR_LENGTH - 1), 0) i_synchronizer_reg_inGreyCount
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pci_synchronizer_flop #((WBW_ADDR_LENGTH - 1), 0) i_synchronizer_reg_inGreyCount
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