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//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.2 2001/10/05 08:14:30 mihad
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// Updated all files with inclusion of timescale file for simulation purposes.
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//
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// Revision 1.1.1.1 2001/10/02 15:33:47 mihad
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// Revision 1.1.1.1 2001/10/02 15:33:47 mihad
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// New project directory structure
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// New project directory structure
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//
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//
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//
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//
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// module provides instantiation of address decoders and address multiplexer for various number of implemented wishbone images
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// module provides instantiation of address decoders and address multiplexer for various number of implemented wishbone images
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`include "constants.v"
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`include "pci_constants.v"
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// synopsys translate_off
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`include "timescale.v"
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`include "timescale.v"
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// synopsys translate_on
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module WB_ADDR_MUX
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module WB_ADDR_MUX
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(
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(
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`ifdef REGISTER_WBS_OUTPUTS
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clk_in,
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reset_in,
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sample_address_in,
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`endif
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address_in,
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address_in,
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bar0_in,
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bar0_in,
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bar1_in,
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bar1_in,
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bar2_in,
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bar2_in,
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bar3_in,
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bar3_in,
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| Line 109... |
Line 119... |
wire [31:0] addr5 ;
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wire [31:0] addr5 ;
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wire [5:0] hit ;
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wire [5:0] hit ;
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assign hit_out = hit ;
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assign hit_out = hit ;
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`ifdef GUEST
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`ifdef REGISTER_WBS_OUTPUTS
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// in guest bridge implementation configuration image can be taken out
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input clk_in, reset_in, sample_address_in ;
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`ifdef WB_CNF_IMAGE
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DECODER #(`WB_NUM_OF_DEC_ADDR_LINES) dec0(
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reg [31:0] address ;
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.hit (hit[0]),
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always@(posedge clk_in or posedge reset_in)
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.addr_out (addr0),
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begin
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.addr_in (address_in),
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if ( reset_in )
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.base_addr (bar0_in),
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address <= #`FF_DELAY 0 ;
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.mask_addr (am0_in),
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else
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.tran_addr (ta0_in),
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if ( sample_address_in )
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.at_en (1'b0)
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address <= #`FF_DELAY address_in ;
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) ;
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end
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`else
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`else
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wire [31:0] address = address_in ;
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`endif
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// configuration image not implemented
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`ifdef GUEST
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assign hit[0] = 1'b0 ;
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`ifdef NO_CNF_IMAGE
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assign addr0 = 32'h0000_0000 ;
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`else
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`define DEC0_INCLUDE
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`endif
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`endif
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`else
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`else
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`ifdef HOST
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`ifdef HOST
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DECODER #(`WB_NUM_OF_DEC_ADDR_LINES) dec0(
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`define DEC0_INCLUDE
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`endif
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`endif
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`ifdef DEC0_INCLUDE
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DECODER #(`WB_NUM_OF_DEC_ADDR_LINES) dec0
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(
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.hit (hit[0]),
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.hit (hit[0]),
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.addr_out (addr0),
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.addr_out (addr0),
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.addr_in (address_in),
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.addr_in (address),
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.base_addr (bar0_in),
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.base_addr (bar0_in),
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.mask_addr (am0_in),
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.mask_addr (am0_in),
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.tran_addr (ta0_in),
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.tran_addr (ta0_in),
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.at_en (1'b0)
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.at_en (1'b0)
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) ;
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) ;
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`endif
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`undef DEC0_INCLUDE
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`else
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// configuration image not implemented
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assign hit[0] = 1'b0 ;
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assign addr0 = 32'h0000_0000 ;
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`endif
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`endif
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// one image is always implemented
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// one image is always implemented
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DECODER #(`WB_NUM_OF_DEC_ADDR_LINES) dec1(
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DECODER #(`WB_NUM_OF_DEC_ADDR_LINES) dec1
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(
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.hit (hit[1]),
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.hit (hit[1]),
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.addr_out (addr1),
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.addr_out (addr1),
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.addr_in (address_in),
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.addr_in (address),
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.base_addr (bar1_in),
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.base_addr (bar1_in),
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.mask_addr (am1_in),
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.mask_addr (am1_in),
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.tran_addr (ta1_in),
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.tran_addr (ta1_in),
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.at_en (at_en_in[1])
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.at_en (at_en_in[1])
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) ;
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) ;
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`ifdef WB_IMAGE2
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`ifdef WB_IMAGE2
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DECODER #(`WB_NUM_OF_DEC_ADDR_LINES) dec2(
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DECODER #(`WB_NUM_OF_DEC_ADDR_LINES) dec2
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(
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.hit (hit[2]),
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.hit (hit[2]),
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.addr_out (addr2),
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.addr_out (addr2),
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.addr_in (address_in),
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.addr_in (address),
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.base_addr (bar2_in),
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.base_addr (bar2_in),
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.mask_addr (am2_in),
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.mask_addr (am2_in),
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.tran_addr (ta2_in),
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.tran_addr (ta2_in),
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.at_en (at_en_in[2])
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.at_en (at_en_in[2])
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) ;
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) ;
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assign hit[5:3] = 3'b000 ;
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assign addr3 = 32'h0000_0000 ;
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assign addr4 = 32'h0000_0000 ;
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assign addr5 = 32'h0000_0000 ;
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// address multiplexer
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always@(hit or addr0 or addr1 or addr2)
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begin
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address_out = addr0 ;
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if ( hit[1] )
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address_out = addr1 ;
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else if ( hit[2] )
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address_out = addr2 ;
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end
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`else
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`ifdef WB_IMAGE3
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assign hit[5:4] = 2'b00 ;
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assign addr4 = 32'h0000_0000 ;
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assign addr5 = 32'h0000_0000 ;
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// address multiplexer
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always@(hit or addr0 or addr1 or addr2 or addr3)
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begin
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address_out = addr0 ;
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if ( hit[1] )
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address_out = addr1 ;
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else if ( hit[2] )
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address_out = addr2 ;
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else if ( hit[3] )
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address_out = addr3 ;
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end
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`else
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`ifdef WB_IMAGE4
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assign hit[5] = 1'b0 ;
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assign addr5 = 32'h0000_0000 ;
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// address multiplexer
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always@(hit or addr0 or addr1 or addr2 or addr3 or addr4)
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begin
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address_out = addr0 ;
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if ( hit[1] )
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address_out = addr1 ;
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else if ( hit[2] )
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address_out = addr2 ;
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else if ( hit[3] )
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address_out = addr3 ;
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else if ( hit[4] )
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address_out = addr4 ;
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end
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`else
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`ifdef WB_IMAGE5
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// address multiplexer
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always@(hit or addr0 or addr1 or addr2 or addr3 or addr4 or addr5)
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begin
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address_out = addr0 ;
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if ( hit[1] )
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address_out = addr1 ;
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else if ( hit[2] )
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address_out = addr2 ;
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else if ( hit[3] )
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address_out = addr3 ;
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else if ( hit[4] )
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address_out = addr4 ;
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else if ( hit[5] )
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address_out = addr5 ;
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end
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`else
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`else
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assign hit[2] = 1'b0 ;
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assign hit[5:2] = 4'b0000 ;
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assign addr2 = 0 ;
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assign addr2 = 32'h0000_0000 ;
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assign addr3 = 32'h0000_0000 ;
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assign addr4 = 32'h0000_0000 ;
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assign addr5 = 32'h0000_0000 ;
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// address multiplexer
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always@(hit or addr0 or addr1)
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begin
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address_out = addr0 ;
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if ( hit[1] )
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address_out = addr1 ;
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end
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`endif
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`endif
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`endif
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`endif
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`endif
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`ifdef WB_IMAGE3
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`ifdef WB_IMAGE3
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DECODER #(`WB_NUM_OF_DEC_ADDR_LINES) dec2(
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DECODER #(`WB_NUM_OF_DEC_ADDR_LINES) dec3
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.hit (hit[2]),
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(
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.addr_out (addr2),
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.addr_in (address_in),
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.base_addr (bar2_in),
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.mask_addr (am2_in),
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.tran_addr (ta2_in),
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.at_en (at_en_in[2])
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) ;
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DECODER #(`WB_NUM_OF_DEC_ADDR_LINES) dec3(
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.hit (hit[3]),
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.hit (hit[3]),
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.addr_out (addr3),
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.addr_out (addr3),
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.addr_in (address_in),
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.addr_in (address),
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.base_addr (bar3_in),
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.base_addr (bar3_in),
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.mask_addr (am3_in),
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.mask_addr (am3_in),
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.tran_addr (ta3_in),
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.tran_addr (ta3_in),
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.at_en (at_en_in[3])
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.at_en (at_en_in[3])
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) ;
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) ;
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`else
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assign hit[3] = 1'b0 ;
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assign addr3 = 0 ;
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`endif
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`endif
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`ifdef WB_IMAGE4
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`ifdef WB_IMAGE4
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DECODER #(`WB_NUM_OF_DEC_ADDR_LINES) dec2(
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DECODER #(`WB_NUM_OF_DEC_ADDR_LINES) dec4
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.hit (hit[2]),
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(
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.addr_out (addr2),
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.addr_in (address_in),
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.base_addr (bar2_in),
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.mask_addr (am2_in),
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.tran_addr (ta2_in),
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.at_en (at_en_in[2])
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) ;
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DECODER #(`WB_NUM_OF_DEC_ADDR_LINES) dec3(
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.hit (hit[3]),
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.addr_out (addr3),
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.addr_in (address_in),
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.base_addr (bar3_in),
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.mask_addr (am3_in),
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.tran_addr (ta3_in),
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.at_en (at_en_in[3])
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) ;
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DECODER #(`WB_NUM_OF_DEC_ADDR_LINES) dec4(
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.hit (hit[4]),
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.hit (hit[4]),
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.addr_out (addr4),
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.addr_out (addr4),
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.addr_in (address_in),
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.addr_in (address),
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.base_addr (bar4_in),
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.base_addr (bar4_in),
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.mask_addr (am4_in),
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.mask_addr (am4_in),
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.tran_addr (ta4_in),
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.tran_addr (ta4_in),
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.at_en (at_en_in[4])
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.at_en (at_en_in[4])
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) ;
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) ;
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`else
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assign hit[4] = 1'b0 ;
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assign addr4 = 0 ;
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`endif
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`endif
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`ifdef WB_IMAGE5
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`ifdef WB_IMAGE5
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DECODER #(`WB_NUM_OF_DEC_ADDR_LINES) dec2(
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DECODER #(`WB_NUM_OF_DEC_ADDR_LINES) dec5
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.hit (hit[2]),
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(
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.addr_out (addr2),
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.addr_in (address_in),
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.base_addr (bar2_in),
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.mask_addr (am2_in),
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.tran_addr (ta2_in),
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.at_en (at_en_in[2])
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) ;
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DECODER #(`WB_NUM_OF_DEC_ADDR_LINES) dec3(
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.hit (hit[3]),
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.addr_out (addr3),
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.addr_in (address_in),
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.base_addr (bar3_in),
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.mask_addr (am3_in),
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.tran_addr (ta3_in),
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.at_en (at_en_in[3])
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) ;
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DECODER #(`WB_NUM_OF_DEC_ADDR_LINES) dec4(
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.hit (hit[4]),
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.addr_out (addr4),
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.addr_in (address_in),
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.base_addr (bar4_in),
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.mask_addr (am4_in),
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.tran_addr (ta4_in),
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.at_en (at_en_in[4])
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) ;
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DECODER #(`WB_NUM_OF_DEC_ADDR_LINES) dec5(
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.hit (hit[5]),
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.hit (hit[5]),
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.addr_out (addr5),
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.addr_out (addr5),
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.addr_in (address_in),
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.addr_in (address),
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.base_addr (bar5_in),
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.base_addr (bar5_in),
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.mask_addr (am5_in),
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.mask_addr (am5_in),
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.tran_addr (ta5_in),
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.tran_addr (ta5_in),
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.at_en (at_en_in[5])
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.at_en (at_en_in[5])
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) ;
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) ;
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`else
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assign hit[5] = 1'b0 ;
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assign addr5 = 0 ;
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`endif
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`endif
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// address multiplexer
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always@
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(
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hit or
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addr0 or
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addr1 or
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addr2 or
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addr3 or
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addr4 or
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addr5
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)
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begin
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case ( {hit[5:2], hit[0]} )
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5'b0_0_0_0_1: address_out = addr0 ;
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5'b0_0_0_1_0: address_out = addr2 ;
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5'b0_0_1_0_0: address_out = addr3 ;
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5'b0_1_0_0_0: address_out = addr4 ;
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5'b1_0_0_0_0: address_out = addr5 ;
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// default address is address from decoder 1 - it is always implemented - in case of stripped down core to only one image
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// this multiplexer can be completely removed during synthesys
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default: address_out = addr1 ;
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endcase
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end
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endmodule
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endmodule
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No newline at end of file
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No newline at end of file
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No newline at end of file
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