Line 40... |
Line 40... |
//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.3 2002/02/01 15:25:14 mihad
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// Repaired a few bugs, updated specification, added test bench files and design document
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//
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// Revision 1.2 2001/10/05 08:14:30 mihad
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// Revision 1.2 2001/10/05 08:14:30 mihad
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// Updated all files with inclusion of timescale file for simulation purposes.
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// Updated all files with inclusion of timescale file for simulation purposes.
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//
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//
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// Revision 1.1.1.1 2001/10/02 15:33:47 mihad
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// Revision 1.1.1.1 2001/10/02 15:33:47 mihad
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// New project directory structure
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// New project directory structure
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Line 62... |
Line 65... |
rclock_in,
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rclock_in,
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wclock_in,
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wclock_in,
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renable_in,
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renable_in,
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wenable_in,
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wenable_in,
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reset_in,
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reset_in,
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flush_in,
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// flush_in, // not used
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almost_full_out,
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almost_full_out,
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full_out,
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full_out,
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empty_out,
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empty_out,
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waddr_out,
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waddr_out,
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raddr_out,
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raddr_out,
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Line 85... |
Line 88... |
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// reset input
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// reset input
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input reset_in;
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input reset_in;
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// flush input
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// flush input
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input flush_in ;
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// input flush_in ; // not used
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// almost full and empy status outputs
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// almost full and empy status outputs
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output almost_full_out ;
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output almost_full_out ;
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// full and empty status outputs
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// full and empty status outputs
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Line 146... |
Line 149... |
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// almost full output assignment
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// almost full output assignment
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assign almost_full_out = almost_full && ~full ;
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assign almost_full_out = almost_full && ~full ;
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// clear generation for FFs and registers
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// clear generation for FFs and registers
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wire clear = reset_in || flush_in ;
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wire clear = reset_in /*|| flush_in*/ ; // flush not used
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reg wclock_nempty_detect ;
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reg wclock_nempty_detect ;
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always@(posedge reset_in or posedge wclock_in)
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always@(posedge clear or posedge wclock_in)
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begin
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begin
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if (reset_in)
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if (clear)
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wclock_nempty_detect <= #`FF_DELAY 1'b0 ;
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wclock_nempty_detect <= #`FF_DELAY 1'b0 ;
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else
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else
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wclock_nempty_detect <= #`FF_DELAY (rgrey_addr != wgrey_addr) ;
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wclock_nempty_detect <= #`FF_DELAY (rgrey_addr != wgrey_addr) ;
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end
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end
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