URL https://opencores.org/ocsvn/pci/pci/trunk

Subversion Repositories pci

[/] [pci/] [tags/] [rel_10/] [rtl/] [verilog/] [pci_wb_master.v] - Diff between revs 117 and 124

Rev 117	Rev 124
Line 40...	Line 40...
`//////////////////////////////////////////////////////////////////////`	`//////////////////////////////////////////////////////////////////////`
`//`	`//`
`// CVS Revision History`	`// CVS Revision History`
`//`	`//`
`// $Log: not supported by cvs2svn $`	`// $Log: not supported by cvs2svn $`
	`// Revision 1.4 2003/08/21 20:56:40 tadejm`
	`// WB Master is now WISHBONE B3 compatible.`
	`//`
`// Revision 1.3 2003/03/14 15:31:57 mihad`	`// Revision 1.3 2003/03/14 15:31:57 mihad`
`// Entered the option to disable no response counter in wb master.`	`// Entered the option to disable no response counter in wb master.`
`//`	`//`
`// Revision 1.2 2003/01/30 22:01:09 mihad`	`// Revision 1.2 2003/01/30 22:01:09 mihad`
`// Updated synchronization in top level fifo modules.`	`// Updated synchronization in top level fifo modules.`
Line 738...	Line 741...
`pci_tar_read_request or`	`pci_tar_read_request or`
`rty_counter_almost_max_value or`	`rty_counter_almost_max_value or`
`set_retry or`	`set_retry or`
`last_data_to_pcir_fifo or`	`last_data_to_pcir_fifo or`
`first_wb_data_access or`	`first_wb_data_access or`
	`pciw_fifo_control_in or`
	`pciw_fifo_empty_in or`
	`burst_transfer or`
`last_data_from_pciw_fifo_reg`	`last_data_from_pciw_fifo_reg`
`)`	`)`
`begin`	`begin`
`case (c_state)`	`case (c_state)`
`S_IDLE:`	`S_IDLE:`