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[/] [pci/] [tags/] [rel_11/] [bench/] [verilog/] [wb_master_behavioral.v] - Diff between revs 15 and 92

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Rev 15 Rev 92
Line 36... Line 36... 
//////////////////////////////////////////////////////////////////////
 
//////////////////////////////////////////////////////////////////////
 
//
 
//
 
// CVS Revision History
 
// CVS Revision History
 
//
 
//
 
// $Log: not supported by cvs2svn $
 
// $Log: not supported by cvs2svn $
 
 
 
// Revision 1.1  2002/02/01 13:39:43  mihad
 
 
 
// Initial testbench import. Still under development
 
 
 
//
 
 
 
 
 
`include "pci_testbench_defines.v"
 
`include "pci_testbench_defines.v"
 
module WB_MASTER_BEHAVIORAL
 
module WB_MASTER_BEHAVIORAL
 
(
 
(
 
    CLK_I,
 
    CLK_I,
Line 134... Line 137... 
    retry = 1 ;
 
    retry = 1 ;
 
 
 
 
 
    while (retry === 1)
 
    while (retry === 1)
 
    begin
 
    begin
 
        // synchronize operation to clock
 
        // synchronize operation to clock
 
 
 
        if (write_flags`WB_FAST_B2B !== 1'b1)
 
        @(posedge CLK_I) ;
 
        @(posedge CLK_I) ;
 
 
 
 
 
        wbm_low_level.start_cycle(cab, 1'b1, ok) ;
 
        wbm_low_level.start_cycle(cab, 1'b1, write_flags`WB_FAST_B2B, ok) ;
 
        if ( ok !== 1 )
 
        if ( ok !== 1 )
 
        begin
 
        begin
 
            $display("*E, Failed to initialize cycle! Routine wb_single_write, Time %t ", $time) ;
 
            $display("*E, Failed to initialize cycle! Routine wb_single_write, Time %t ", $time) ;
 
            return`TB_ERROR_BIT = 1'b1 ;
 
            return`TB_ERROR_BIT = 1'b1 ;
 
            disable main ;
 
            disable main ;
Line 225... Line 229... 
    retry = 1 ;
 
    retry = 1 ;
 
 
 
 
 
    while (retry === 1)
 
    while (retry === 1)
 
    begin
 
    begin
 
        // synchronize operation to clock
 
        // synchronize operation to clock
 
 
 
        if (read_flags`WB_FAST_B2B !== 1'b1)
 
        @(posedge CLK_I) ;
 
        @(posedge CLK_I) ;
 
 
 
 
 
        wbm_low_level.start_cycle(cab, 1'b0, ok) ;
 
        wbm_low_level.start_cycle(cab, 1'b0, read_flags`WB_FAST_B2B, ok) ;
 
        if ( ok !== 1 )
 
        if ( ok !== 1 )
 
        begin
 
        begin
 
            $display("*E, Failed to initialize cycle! Routine wb_single_read, Time %t ", $time) ;
 
            $display("*E, Failed to initialize cycle! Routine wb_single_read, Time %t ", $time) ;
 
            return`TB_ERROR_BIT = 1'b1 ;
 
            return`TB_ERROR_BIT = 1'b1 ;
 
            disable main ;
 
            disable main ;
Line 318... Line 323... 
    retry = 1 ;
 
    retry = 1 ;
 
 
 
 
 
    while (retry === 1)
 
    while (retry === 1)
 
    begin
 
    begin
 
        // synchronize operation to clock
 
        // synchronize operation to clock
 
 
 
        if (read_flags`WB_FAST_B2B !== 1'b1)
 
        @(posedge CLK_I) ;
 
        @(posedge CLK_I) ;
 
 
 
 
 
        wbm_low_level.start_cycle(cab, 1'b0, ok) ;
 
        wbm_low_level.start_cycle(cab, 1'b0, read_flags`WB_FAST_B2B, ok) ;
 
        if ( ok !== 1 )
 
        if ( ok !== 1 )
 
        begin
 
        begin
 
            $display("*E, Failed to initialize cycle! Routine wb_RMW_read, Time %t ", $time) ;
 
            $display("*E, Failed to initialize cycle! Routine wb_RMW_read, Time %t ", $time) ;
 
            return`TB_ERROR_BIT = 1'b1 ;
 
            return`TB_ERROR_BIT = 1'b1 ;
 
            disable main ;
 
            disable main ;
Line 414... Line 420... 
    retry = 1 ;
 
    retry = 1 ;
 
 
 
 
 
    while (retry === 1)
 
    while (retry === 1)
 
    begin
 
    begin
 
        // synchronize operation to clock
 
        // synchronize operation to clock
 
 
 
        if (write_flags`WB_FAST_B2B !== 1'b1)
 
        @(posedge CLK_I) ;
 
        @(posedge CLK_I) ;
 
 
 
 
 
        ok = 1 ;
 
        ok = 1 ;
 
        if (rty_count !== 0)
 
        if (rty_count !== 0)
 
            wbm_low_level.start_cycle(cab, 1'b1, ok) ;
 
            wbm_low_level.start_cycle(cab, 1'b1, write_flags`WB_FAST_B2B, ok) ;
 
 
 
 
 
        if ( ok !== 1 )
 
        if ( ok !== 1 )
 
        begin
 
        begin
 
            $display("*E, Failed to initialize cycle! Routine wb_single_write, Time %t ", $time) ;
 
            $display("*E, Failed to initialize cycle! Routine wb_single_write, Time %t ", $time) ;
 
            return`TB_ERROR_BIT = 1'b1 ;
 
            return`TB_ERROR_BIT = 1'b1 ;
Line 507... Line 515... 
        return`TB_ERROR_BIT = 1'b1 ;
 
        return`TB_ERROR_BIT = 1'b1 ;
 
        disable main ;
 
        disable main ;
 
    end
 
    end
 
 
 
 
 
    in_use = 1 ;
 
    in_use = 1 ;
 
 
 
    if (write_flags`WB_FAST_B2B !== 1'b1)
 
    @(posedge CLK_I) ;
 
    @(posedge CLK_I) ;
 
 
 
 
 
    cab = write_flags`WB_TRANSFER_CAB ;
 
    cab = write_flags`WB_TRANSFER_CAB ;
 
    wbm_low_level.start_cycle(cab, 1'b1, ok) ;
 
    wbm_low_level.start_cycle(cab, 1'b1, write_flags`WB_FAST_B2B, ok) ;
 
    if ( ok !== 1 )
 
    if ( ok !== 1 )
 
    begin
 
    begin
 
        $display("*E, Failed to initialize cycle! Routine wb_block_write, Time %t ", $time) ;
 
        $display("*E, Failed to initialize cycle! Routine wb_block_write, Time %t ", $time) ;
 
        return`TB_ERROR_BIT = 1'b1 ;
 
        return`TB_ERROR_BIT = 1'b1 ;
 
        disable main ;
 
        disable main ;
Line 595... Line 605... 
            end
 
            end
 
        end
 
        end
 
 
 
 
 
        if ( (end_blk === 0) && (return`CYC_RTY === 1) )
 
        if ( (end_blk === 0) && (return`CYC_RTY === 1) )
 
        begin
 
        begin
 
 
 
            if (write_flags`WB_FAST_B2B !== 1'b1)
 
 
 
            begin
 
            wbm_low_level.end_cycle ;
 
            wbm_low_level.end_cycle ;
 
            @(posedge CLK_I) ;
 
            @(posedge CLK_I) ;
 
            wbm_low_level.start_cycle(cab, 1'b1, ok) ;
 
                wbm_low_level.start_cycle(cab, 1'b1, 1'b0, ok) ;
 
            if ( ok !== 1 )
 
            if ( ok !== 1 )
 
            begin
 
            begin
 
                $display("*E, Failed to initialize cycle! Routine wb_block_write, Time %t ", $time) ;
 
                $display("*E, Failed to initialize cycle! Routine wb_block_write, Time %t ", $time) ;
 
                return`TB_ERROR_BIT = 1'b1 ;
 
                return`TB_ERROR_BIT = 1'b1 ;
 
                end_blk = 1 ;
 
                end_blk = 1 ;
 
            end
 
            end
 
        end
 
        end
 
 
 
        end
 
    end //while
 
    end //while
 
 
 
 
 
    wbm_low_level.end_cycle ;
 
    wbm_low_level.end_cycle ;
 
    in_use = 0 ;
 
    in_use = 0 ;
 
end //main
 
end //main
Line 649... Line 662... 
 
 
 
 
    in_use = 1 ;
 
    in_use = 1 ;
 
    @(posedge CLK_I) ;
 
    @(posedge CLK_I) ;
 
    cab = read_flags`WB_TRANSFER_CAB ;
 
    cab = read_flags`WB_TRANSFER_CAB ;
 
 
 
 
 
    wbm_low_level.start_cycle(cab, 1'b0, ok) ;
 
    wbm_low_level.start_cycle(cab, 1'b0, read_flags`WB_FAST_B2B, ok) ;
 
 
 
 
 
    if ( ok !== 1 )
 
    if ( ok !== 1 )
 
    begin
 
    begin
 
        $display("*E, Failed to initialize cycle! Routine wb_block_read, Time %t ", $time) ;
 
        $display("*E, Failed to initialize cycle! Routine wb_block_read, Time %t ", $time) ;
 
        return`TB_ERROR_BIT = 1'b1 ;
 
        return`TB_ERROR_BIT = 1'b1 ;
Line 743... Line 756... 
            end
 
            end
 
        end
 
        end
 
 
 
 
 
        if ( (end_blk === 0) && (return`CYC_RTY === 1) )
 
        if ( (end_blk === 0) && (return`CYC_RTY === 1) )
 
        begin
 
        begin
 
 
 
            if (read_flags`WB_FAST_B2B !== 1'b1)
 
 
 
            begin
 
            wbm_low_level.end_cycle ;
 
            wbm_low_level.end_cycle ;
 
            @(posedge CLK_I) ;
 
            @(posedge CLK_I) ;
 
            wbm_low_level.start_cycle(cab, 1'b0, ok) ;
 
                wbm_low_level.start_cycle(cab, 1'b0, 1'b0, ok) ;
 
            if ( ok !== 1 )
 
            if ( ok !== 1 )
 
            begin
 
            begin
 
                $display("*E, Failed to initialize cycle! Routine wb_block_read, Time %t ", $time) ;
 
                $display("*E, Failed to initialize cycle! Routine wb_block_read, Time %t ", $time) ;
 
                return`TB_ERROR_BIT = 1'b1 ;
 
                return`TB_ERROR_BIT = 1'b1 ;
 
                end_blk = 1 ;
 
                end_blk = 1 ;
 
            end
 
            end
 
        end
 
        end
 
 
 
        end
 
    end //while
 
    end //while
 
 
 
 
 
    wbm_low_level.end_cycle ;
 
    wbm_low_level.end_cycle ;
 
    in_use = 0 ;
 
    in_use = 0 ;
 
end //main
 
end //main
 
endtask //wb_block_read
 
endtask //wb_block_read
 
 
 
 
 
 
 
task shift_write_buffer ;
 
 
 
    input [31:0] shift_num ;
 
 
 
    integer i ;
 
 
 
begin
 
 
 
    if (shift_num < `MAX_BLK_SIZE)
 
 
 
    begin
 
 
 
 
 
 
 
        for (i = 0 ; i + shift_num < `MAX_BLK_SIZE ; i = i + 1)
 
 
 
        begin
 
 
 
            blk_write_data[i] = blk_write_data[i + shift_num] ;
 
 
 
        end
 
 
 
 
 
 
 
        for (i = (`MAX_BLK_SIZE - shift_num) ; i < `MAX_BLK_SIZE ; i = i + 1)
 
 
 
            blk_write_data[i] = {1024{1'bx}} ;
 
 
 
    end
 
 
 
end
 
 
 
endtask // shift_write_buffer
 
 
 
 
 
endmodule
 
endmodule
 
 
 
 
 
 
 
 
 
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