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[/] [pci/] [tags/] [rel_3/] [rtl/] [verilog/] [bus_commands.v] - Diff between revs 6 and 21

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//////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////
//
//
// CVS Revision History
// CVS Revision History
//
//
// $Log: not supported by cvs2svn $
// $Log: not supported by cvs2svn $
 
// Revision 1.2  2001/10/05 08:14:28  mihad
 
// Updated all files with inclusion of timescale file for simulation purposes.
 
//
// Revision 1.1.1.1  2001/10/02 15:33:47  mihad
// Revision 1.1.1.1  2001/10/02 15:33:47  mihad
// New project directory structure
// New project directory structure
//
//
//
//
 
 
// definitions of PCI bus commands
// definitions of PCI bus commands | used by PCI Master | used by PCI Target
`define BC_IACK             4'h0  //used
`define BC_IACK             4'h0  //                            yes                                     no
`define BC_SPECIAL          4'h1  //not used
`define BC_SPECIAL          4'h1  //                            no                                      no
`define BC_IO_READ          4'h2  //used
`define BC_IO_READ          4'h2  //                            yes                                     yes
`define BC_IO_WRITE         4'h3  //used
`define BC_IO_WRITE         4'h3  //                            yes                                     yes
`define BC_RESERVED0        4'h4  //not used
`define BC_RESERVED0        4'h4  //                            no                                      no
`define BC_RESERVED1        4'h5  //not used
`define BC_RESERVED1        4'h5  //                            no                                      no
`define BC_MEM_READ         4'h6  //used
`define BC_MEM_READ         4'h6  //                            yes                                     yes
`define BC_MEM_WRITE        4'h7  //used
`define BC_MEM_WRITE        4'h7  //                            yes                                     yes
`define BC_RESERVED2        4'h8  //not used
`define BC_RESERVED2        4'h8  //                            no                                      no
`define BC_RESERVED3        4'h9  //not used
`define BC_RESERVED3        4'h9  //                            no                                      no
`define BC_CONF_READ        4'hA  //used
`define BC_CONF_READ        4'hA  //                            yes                                     yes
`define BC_CONF_WRITE       4'hB  //used
`define BC_CONF_WRITE       4'hB  //                            yes                                     yes
`define BC_MEM_READ_MUL     4'hC  //used
`define BC_MEM_READ_MUL     4'hC  //                            yes                                     yes
`define BC_DUAL_ADDR_CYC    4'hD  //not used
`define BC_DUAL_ADDR_CYC    4'hD  //                            no                                      no
`define BC_MEM_READ_LN      4'hE  //used
`define BC_MEM_READ_LN      4'hE  //                            yes                                     yes
`define BC_MEM_WRITE_INVAL  4'hF  //not used
`define BC_MEM_WRITE_INVAL  4'hF  //                            no                                      yes
 
 
// common bits for configuration cycle commands
// common bits for configuration cycle commands
`define BC_CONF_RW 3'b101
`define BC_CONF_RW 3'b101
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