URL https://opencores.org/ocsvn/pci/pci/trunk

Subversion Repositories pci

[/] [pci/] [tags/] [rel_3/] [rtl/] [verilog/] [conf_cyc_addr_dec.v] - Diff between revs 6 and 21

Rev 6	Rev 21
Line 40...	Line 40...
`//////////////////////////////////////////////////////////////////////`	`//////////////////////////////////////////////////////////////////////`
`//`	`//`
`// CVS Revision History`	`// CVS Revision History`
`//`	`//`
`// $Log: not supported by cvs2svn $`	`// $Log: not supported by cvs2svn $`
	`// Revision 1.2 2001/10/05 08:14:28 mihad`
	`// Updated all files with inclusion of timescale file for simulation purposes.`
	`//`
`// Revision 1.1.1.1 2001/10/02 15:33:46 mihad`	`// Revision 1.1.1.1 2001/10/02 15:33:46 mihad`
`// New project directory structure`	`// New project directory structure`
`//`	`//`
`//`	`//`


`// module is a simple decoder which decodes device num field of configuration address`	`// module is a simple decoder which decodes device num field of configuration address`
`// for type0 configuration cycles. If type 1 configuration cycle is`	`// for type0 configuration cycles. If type 1 configuration cycle is`
`// initiated then address goes through unchanged`	`// initiated then address goes through unchanged`

`include "constants.v"	`// synopsys translate_off`
`include "timescale.v"	`include "timescale.v"
	`// synopsys translate_on`

`module CONF_CYC_ADDR_DEC`	`module CONF_CYC_ADDR_DEC`
`(`	`(`
`ccyc_addr_in,`	`ccyc_addr_in,`
`ccyc_addr_out`	`ccyc_addr_out`