URL https://opencores.org/ocsvn/pci/pci/trunk

Subversion Repositories pci

[/] [pci/] [tags/] [rel_3/] [rtl/] [verilog/] [irdy_out_crit.v] - Diff between revs 6 and 21

Rev 6	Rev 21
Line 40...	Line 40...
`//////////////////////////////////////////////////////////////////////`	`//////////////////////////////////////////////////////////////////////`
`//`	`//`
`// CVS Revision History`	`// CVS Revision History`
`//`	`//`
`// $Log: not supported by cvs2svn $`	`// $Log: not supported by cvs2svn $`
	`// Revision 1.2 2001/10/05 08:14:28 mihad`
	`// Updated all files with inclusion of timescale file for simulation purposes.`
	`//`
`// Revision 1.1.1.1 2001/10/02 15:33:46 mihad`	`// Revision 1.1.1.1 2001/10/02 15:33:46 mihad`
`// New project directory structure`	`// New project directory structure`
`//`	`//`
`//`	`//`

`// module is used to separate logic which uses criticaly constrained inputs from slower logic.`	`// module is used to separate logic which uses criticaly constrained inputs from slower logic.`
`// It is used to synthesize critical timing logic separately with faster cells or without optimization`	`// It is used to synthesize critical timing logic separately with faster cells or without optimization`

	`// synopsys translate_off`
`include "timescale.v"	`include "timescale.v"
	`// synopsys translate_on`

`// This module is used in master state machine for IRDY output driving`	`// This module is used in master state machine for IRDY output driving`

`module IRDY_OUT_CRIT`	`module IRDY_OUT_CRIT`
`(`	`(`
`pci_irdy_out,`	`pci_irdy_out,`