| Line 41... |
Line 41... |
//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.4 2002/10/08 17:17:05 mihad
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// Added BIST signals for RAMs.
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//
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// Revision 1.3 2002/02/01 15:25:12 mihad
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// Revision 1.3 2002/02/01 15:25:12 mihad
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// Repaired a few bugs, updated specification, added test bench files and design document
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// Repaired a few bugs, updated specification, added test bench files and design document
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//
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//
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// Revision 1.2 2001/10/05 08:14:28 mihad
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// Revision 1.2 2001/10/05 08:14:28 mihad
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// Updated all files with inclusion of timescale file for simulation purposes.
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// Updated all files with inclusion of timescale file for simulation purposes.
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| Line 161... |
Line 164... |
PCI_SERRn_EN_OUT
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PCI_SERRn_EN_OUT
|
|
|
`ifdef PCI_BIST
|
`ifdef PCI_BIST
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,
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,
|
// debug chain signals
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// debug chain signals
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|
trst ,
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SO ,
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SO ,
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SI ,
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SI ,
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shift_DR ,
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shift_DR ,
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capture_DR ,
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capture_DR ,
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extest ,
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extest ,
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| Line 268... |
Line 272... |
|
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`ifdef PCI_BIST
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`ifdef PCI_BIST
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/*-----------------------------------------------------
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/*-----------------------------------------------------
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BIST debug chain port signals
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BIST debug chain port signals
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-----------------------------------------------------*/
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-----------------------------------------------------*/
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|
input trst ;
|
output SO ;
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output SO ;
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input SI ;
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input SI ;
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input shift_DR ;
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input shift_DR ;
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input capture_DR ;
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input capture_DR ;
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input extest ;
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input extest ;
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| Line 793... |
Line 798... |
.wbu_pciif_stop_reg_in (wbu_pciif_stop_reg_in),
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.wbu_pciif_stop_reg_in (wbu_pciif_stop_reg_in),
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.wbu_pciif_devsel_reg_in (wbu_pciif_devsel_reg_in)
|
.wbu_pciif_devsel_reg_in (wbu_pciif_devsel_reg_in)
|
|
|
`ifdef PCI_BIST
|
`ifdef PCI_BIST
|
,
|
,
|
|
.trst (trst),
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.SO (SO_internal),
|
.SO (SO_internal),
|
.SI (SI),
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.SI (SI),
|
.shift_DR (shift_DR),
|
.shift_DR (shift_DR),
|
.capture_DR (capture_DR),
|
.capture_DR (capture_DR),
|
.extest (extest),
|
.extest (extest),
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| Line 976... |
Line 982... |
.pciu_pci_drcomp_pending_out (pciu_pci_drcomp_pending_out),
|
.pciu_pci_drcomp_pending_out (pciu_pci_drcomp_pending_out),
|
.pciu_pciw_fifo_empty_out (pciu_pciw_fifo_empty_out)
|
.pciu_pciw_fifo_empty_out (pciu_pciw_fifo_empty_out)
|
|
|
`ifdef PCI_BIST
|
`ifdef PCI_BIST
|
,
|
,
|
|
.trst (trst),
|
.SO (SO),
|
.SO (SO),
|
.SI (SI_internal),
|
.SI (SI_internal),
|
.shift_DR (shift_DR),
|
.shift_DR (shift_DR),
|
.capture_DR (capture_DR),
|
.capture_DR (capture_DR),
|
.extest (extest),
|
.extest (extest),
|
