OpenCores
URL https://opencores.org/ocsvn/pci/pci/trunk

Subversion Repositories pci

[/] [pci/] [tags/] [rel_3/] [rtl/] [verilog/] [pci_target_unit.v] - Diff between revs 26 and 33

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 26 Rev 33
Line 40... Line 40...
//////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////
//
//
// CVS Revision History
// CVS Revision History
//
//
// $Log: not supported by cvs2svn $
// $Log: not supported by cvs2svn $
 
// Revision 1.4  2002/02/19 16:32:37  mihad
 
// Modified testbench and fixed some bugs
 
//
// Revision 1.3  2002/02/01 15:25:13  mihad
// Revision 1.3  2002/02/01 15:25:13  mihad
// Repaired a few bugs, updated specification, added test bench files and design document
// Repaired a few bugs, updated specification, added test bench files and design document
//
//
// Revision 1.2  2001/10/05 08:14:30  mihad
// Revision 1.2  2001/10/05 08:14:30  mihad
// Updated all files with inclusion of timescale file for simulation purposes.
// Updated all files with inclusion of timescale file for simulation purposes.
Line 515... Line 518...
    .pcir_renable_in            (fifos_pcir_renable_in),      //for PCI Target !!!
    .pcir_renable_in            (fifos_pcir_renable_in),      //for PCI Target !!!
    .pcir_data_out              (fifos_pcir_data_out),        //for PCI Target !!!
    .pcir_data_out              (fifos_pcir_data_out),        //for PCI Target !!!
    .pcir_be_out                (fifos_pcir_be_out),          //for PCI Target !!!
    .pcir_be_out                (fifos_pcir_be_out),          //for PCI Target !!!
    .pcir_control_out           (fifos_pcir_control_out),     //for PCI Target !!!
    .pcir_control_out           (fifos_pcir_control_out),     //for PCI Target !!!
    .pcir_flush_in              (fifos_pcir_flush_in),        //for PCI Target !!!
    .pcir_flush_in              (fifos_pcir_flush_in),        //for PCI Target !!!
    .pcir_almost_full_out       (),
 
    .pcir_full_out              (),
    .pcir_full_out              (),
    .pcir_almost_empty_out      (fifos_pcir_almost_empty_out), //for PCI Target !!!
    .pcir_almost_empty_out      (fifos_pcir_almost_empty_out), //for PCI Target !!!
    .pcir_empty_out             (fifos_pcir_empty_out),        //for PCI Target !!!
    .pcir_empty_out             (fifos_pcir_empty_out),        //for PCI Target !!!
    .pcir_transaction_ready_out ()
    .pcir_transaction_ready_out ()
) ;
) ;
Line 853... Line 855...
    .wbu_del_read_comp_pending_in               (pcit_sm_wbu_del_read_comp_pending_in),
    .wbu_del_read_comp_pending_in               (pcit_sm_wbu_del_read_comp_pending_in),
    .wbu_frame_en_in                    (pcit_sm_wbu_frame_en_in)
    .wbu_frame_en_in                    (pcit_sm_wbu_frame_en_in)
) ;
) ;
 
 
endmodule
endmodule
 No newline at end of file
 No newline at end of file
 
 
 No newline at end of file
 No newline at end of file

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.