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[/] [pci/] [tags/] [rel_3/] [rtl/] [verilog/] [top.v] - Diff between revs 21 and 35

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Rev 21 Rev 35
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//////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////
//
//
// CVS Revision History
// CVS Revision History
//
//
// $Log: not supported by cvs2svn $
// $Log: not supported by cvs2svn $
 
// Revision 1.3  2002/02/01 15:25:13  mihad
 
// Repaired a few bugs, updated specification, added test bench files and design document
 
//
// Revision 1.2  2001/10/05 08:14:30  mihad
// Revision 1.2  2001/10/05 08:14:30  mihad
// Updated all files with inclusion of timescale file for simulation purposes.
// Updated all files with inclusion of timescale file for simulation purposes.
//
//
// Revision 1.1.1.1  2001/10/02 15:33:47  mihad
// Revision 1.1.1.1  2001/10/02 15:33:47  mihad
// New project directory structure
// New project directory structure
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// Other cores can be included in this top module and appropriate changes incorporated for overall design
// Other cores can be included in this top module and appropriate changes incorporated for overall design
 
 
// synopsys translate_off
// synopsys translate_off
`include "timescale.v"
`include "timescale.v"
// synopsys translate_on
// synopsys translate_on
 
`include "pci_constants.v"
 
 
module TOP
module TOP
(
(
    CLK,
    CLK,
    AD,
    AD,
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    // system error pin
    // system error pin
    .PCI_SERRn_OUT ( SERR_out ),
    .PCI_SERRn_OUT ( SERR_out ),
    .PCI_SERRn_EN_OUT ( SERR_en )
    .PCI_SERRn_EN_OUT ( SERR_en )
);
);
 
 
 
 
// PCI IO buffers instantiation
// PCI IO buffers instantiation
`ifdef ACTIVE_LOW_OE
`ifdef ACTIVE_LOW_OE
 
 
bufif0 AD_buf0   ( AD[0],  AD_out[0], AD_en[0]) ;
bufif0 AD_buf0   ( AD[0],  AD_out[0], AD_en[0]) ;
bufif0 AD_buf1   ( AD[1],  AD_out[1], AD_en[1]) ;
bufif0 AD_buf1   ( AD[1],  AD_out[1], AD_en[1]) ;
bufif0 AD_buf2   ( AD[2],  AD_out[2], AD_en[2]) ;
bufif0 AD_buf2   ( AD[2],  AD_out[2], AD_en[2]) ;
bufif0 AD_buf3   ( AD[3],  AD_out[3], AD_en[3]) ;
bufif0 AD_buf3   ( AD[3],  AD_out[3], AD_en[3]) ;
bufif0 AD_buf4   ( AD[4],  AD_out[4], AD_en[4]) ;
bufif0 AD_buf4   ( AD[4],  AD_out[4], AD_en[4]) ;
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bufif0 PERR_buf     ( PERR, PERR_out, PERR_en ) ;
bufif0 PERR_buf     ( PERR, PERR_out, PERR_en ) ;
bufif0 SERR_buf     ( SERR, SERR_out, SERR_en ) ;
bufif0 SERR_buf     ( SERR, SERR_out, SERR_en ) ;
 
 
`else
`else
`ifdef ACTIVE_HIGH_OE
`ifdef ACTIVE_HIGH_OE
 
 
bufif1 AD_buf0   ( AD[0],  AD_out[0], AD_en[0]) ;
bufif1 AD_buf0   ( AD[0],  AD_out[0], AD_en[0]) ;
bufif1 AD_buf1   ( AD[1],  AD_out[1], AD_en[1]) ;
bufif1 AD_buf1   ( AD[1],  AD_out[1], AD_en[1]) ;
bufif1 AD_buf2   ( AD[2],  AD_out[2], AD_en[2]) ;
bufif1 AD_buf2   ( AD[2],  AD_out[2], AD_en[2]) ;
bufif1 AD_buf3   ( AD[3],  AD_out[3], AD_en[3]) ;
bufif1 AD_buf3   ( AD[3],  AD_out[3], AD_en[3]) ;
bufif1 AD_buf4   ( AD[4],  AD_out[4], AD_en[4]) ;
bufif1 AD_buf4   ( AD[4],  AD_out[4], AD_en[4]) ;

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