| Line 40... |
Line 40... |
//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.7 2002/10/17 22:49:22 tadejm
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// Changed BIST signals for RAMs.
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//
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// Revision 1.6 2002/10/11 10:09:01 mihad
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// Revision 1.6 2002/10/11 10:09:01 mihad
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// Added additional testcase and changed rst name in BIST to trst
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// Added additional testcase and changed rst name in BIST to trst
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//
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//
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// Revision 1.5 2002/10/08 17:17:06 mihad
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// Revision 1.5 2002/10/08 17:17:06 mihad
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// Added BIST signals for RAMs.
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// Added BIST signals for RAMs.
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Line 164... |
// debug chain signals
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// debug chain signals
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scanb_rst, // bist scan reset
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scanb_rst, // bist scan reset
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scanb_clk, // bist scan clock
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scanb_clk, // bist scan clock
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scanb_si, // bist scan serial in
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scanb_si, // bist scan serial in
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scanb_so, // bist scan serial out
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scanb_so, // bist scan serial out
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scanb_sen // bist scan shift enable
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scanb_en // bist scan shift enable
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`endif
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`endif
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);
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);
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input reset_in,
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input reset_in,
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wb_clock_in,
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wb_clock_in,
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| Line 272... |
Line 275... |
-----------------------------------------------------*/
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-----------------------------------------------------*/
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input scanb_rst; // bist scan reset
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input scanb_rst; // bist scan reset
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input scanb_clk; // bist scan clock
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input scanb_clk; // bist scan clock
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input scanb_si; // bist scan serial in
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input scanb_si; // bist scan serial in
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output scanb_so; // bist scan serial out
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output scanb_so; // bist scan serial out
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input scanb_sen; // bist scan shift enable
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input scanb_en; // bist scan shift enable
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`endif
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`endif
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// pci master interface outputs
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// pci master interface outputs
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wire [31:0] pcim_if_address_out ;
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wire [31:0] pcim_if_address_out ;
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wire [3:0] pcim_if_bc_out ;
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wire [3:0] pcim_if_bc_out ;
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| Line 580... |
Line 583... |
,
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,
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.scanb_rst (scanb_rst),
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.scanb_rst (scanb_rst),
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.scanb_clk (scanb_clk),
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.scanb_clk (scanb_clk),
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.scanb_si (scanb_si),
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.scanb_si (scanb_si),
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.scanb_so (scanb_so),
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.scanb_so (scanb_so),
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.scanb_sen (scanb_sen)
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.scanb_en (scanb_en)
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`endif
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`endif
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) ;
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) ;
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wire [31:0] amux_addr_in = ADDR_I ;
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wire [31:0] amux_addr_in = ADDR_I ;
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wire amux_sample_address_in = wbs_sm_sample_address_out ;
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wire amux_sample_address_in = wbs_sm_sample_address_out ;
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