OpenCores
URL https://opencores.org/ocsvn/pci/pci/trunk

Subversion Repositories pci

[/] [pci/] [tags/] [rel_6/] [rtl/] [verilog/] [pci_pciw_pcir_fifos.v] - Diff between revs 88 and 108

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 88 Rev 108
Line 40... Line 40...
//////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////
//
//
// CVS Revision History
// CVS Revision History
//
//
// $Log: not supported by cvs2svn $
// $Log: not supported by cvs2svn $
 
// Revision 1.3  2003/03/26 13:16:18  mihad
 
// Added the reset value parameter to the synchronizer flop module.
 
// Added resets to all synchronizer flop instances.
 
// Repaired initial sync value in fifos.
 
//
// Revision 1.2  2003/01/30 22:01:08  mihad
// Revision 1.2  2003/01/30 22:01:08  mihad
// Updated synchronization in top level fifo modules.
// Updated synchronization in top level fifo modules.
//
//
// Revision 1.1  2003/01/27 16:49:31  mihad
// Revision 1.1  2003/01/27 16:49:31  mihad
// Changed module and file names. Updated scripts accordingly. FIFO synchronizations changed.
// Changed module and file names. Updated scripts accordingly. FIFO synchronizations changed.
Line 98... Line 103...
    pciw_renable_in,
    pciw_renable_in,
    pciw_addr_data_out,
    pciw_addr_data_out,
    pciw_cbe_out,
    pciw_cbe_out,
    pciw_control_out,
    pciw_control_out,
//    pciw_flush_in,    // not used
//    pciw_flush_in,    // not used
 
    pciw_three_left_out,
    pciw_two_left_out,
    pciw_two_left_out,
    pciw_almost_full_out,
    pciw_almost_full_out,
    pciw_full_out,
    pciw_full_out,
    pciw_almost_empty_out,
    pciw_almost_empty_out,
    pciw_empty_out,
    pciw_empty_out,
Line 182... Line 188...
 
 
// flush input
// flush input
//input pciw_flush_in ;     // not used
//input pciw_flush_in ;     // not used
 
 
// status outputs
// status outputs
 
output pciw_three_left_out ;
output pciw_two_left_out ;
output pciw_two_left_out ;
output pciw_almost_full_out ;
output pciw_almost_full_out ;
output pciw_full_out ;
output pciw_full_out ;
output pciw_almost_empty_out ;
output pciw_almost_empty_out ;
output pciw_empty_out ;
output pciw_empty_out ;
Line 512... Line 519...
    .wclock_in(pci_clock_in),
    .wclock_in(pci_clock_in),
    .renable_in(pciw_renable_in),
    .renable_in(pciw_renable_in),
    .wenable_in(pciw_wenable_in),
    .wenable_in(pciw_wenable_in),
    .reset_in(reset_in),
    .reset_in(reset_in),
//    .flush_in(pciw_flush_in),                     // flush not used
//    .flush_in(pciw_flush_in),                     // flush not used
 
    .three_left_out(pciw_three_left_out),
    .two_left_out(pciw_two_left_out),
    .two_left_out(pciw_two_left_out),
    .almost_full_out(pciw_almost_full_out),
    .almost_full_out(pciw_almost_full_out),
    .full_out(pciw_full_out),
    .full_out(pciw_full_out),
    .almost_empty_out(pciw_almost_empty_out),
    .almost_empty_out(pciw_almost_empty_out),
    .empty_out(pciw_empty),
    .empty_out(pciw_empty),

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.