Line 65... |
Line 65... |
// next 3 defines are derived from previous three defines
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// next 3 defines are derived from previous three defines
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`define TAR0_IDSEL_ADDR (32'h0000_0001 << `TAR0_IDSEL_INDEX)
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`define TAR0_IDSEL_ADDR (32'h0000_0001 << `TAR0_IDSEL_INDEX)
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`define TAR1_IDSEL_ADDR (32'h0000_0001 << `TAR1_IDSEL_INDEX)
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`define TAR1_IDSEL_ADDR (32'h0000_0001 << `TAR1_IDSEL_INDEX)
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`define TAR2_IDSEL_ADDR (32'h0000_0001 << `TAR2_IDSEL_INDEX)
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`define TAR2_IDSEL_ADDR (32'h0000_0001 << `TAR2_IDSEL_INDEX)
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`define DISABLE_COMPLETION_EXPIRED_TESTS
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//`define DISABLE_COMPLETION_EXPIRED_TESTS
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`endif
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`endif
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//===================================================================================
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//===================================================================================
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// User-unchangeable testbench defines (constants)
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// User-unchangeable testbench defines (constants)
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//===================================================================================
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//===================================================================================
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Line 80... |
Line 80... |
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// how many clock cycles should model wait for design's response - integer 32 bit value
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// how many clock cycles should model wait for design's response - integer 32 bit value
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`define WAIT_FOR_RESPONSE 6
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`define WAIT_FOR_RESPONSE 6
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// maximum number of transactions allowed in single call to block or cab transfer routines
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// maximum number of transactions allowed in single call to block or cab transfer routines
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`define MAX_BLK_SIZE 1024
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`define MAX_BLK_SIZE 4096
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// maximum retry terminations allows for WISHBONE master to repeat an access
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// maximum retry terminations allows for WISHBONE master to repeat an access
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`define WB_TB_MAX_RTY 10000
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`define WB_TB_MAX_RTY 10000
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Line 154... |
Line 154... |
`define CYC_ERR [3]
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`define CYC_ERR [3]
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`define CYC_RESPONSE [3:1]
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`define CYC_RESPONSE [3:1]
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`define CYC_ACTUAL_TRANSFER [35:4]
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`define CYC_ACTUAL_TRANSFER [35:4]
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// block transfer flags
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// block transfer flags
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`define WB_TRANSFER_FLAGS [41:0]
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`define WB_TRANSFER_FLAGS [42:0]
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// consists of:
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// consists of:
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// - number of transfer cycles to perform
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// - number of transfer cycles to perform
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// - flag that enables retry termination handling - if disabled, block transfer routines will return on any termination other than acknowledge
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// - flag that enables retry termination handling - if disabled, block transfer routines will return on any termination other than acknowledge
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// - flag indicating CAB transfer is to be performed - ignored by all single transfer routines
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// - flag indicating CAB transfer is to be performed - ignored by all single transfer routines
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// - number of initial wait states to insert
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// - number of initial wait states to insert
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// - number of subsequent wait states to insert
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// - number of subsequent wait states to insert
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`define WB_FAST_B2B [42]
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`define WB_TRANSFER_SIZE [41:10]
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`define WB_TRANSFER_SIZE [41:10]
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`define WB_TRANSFER_AUTO_RTY [8]
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`define WB_TRANSFER_AUTO_RTY [8]
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`define WB_TRANSFER_CAB [9]
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`define WB_TRANSFER_CAB [9]
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`define INIT_WAITS [3:0]
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`define INIT_WAITS [3:0]
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`define SUBSEQ_WAITS [7:4]
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`define SUBSEQ_WAITS [7:4]
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