| Line 37... |
Line 37... |
//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.14 2003/01/30 22:01:33 mihad
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// Updated synchronization in top level fifo modules.
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//
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// Revision 1.13 2003/01/21 16:06:50 mihad
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// Revision 1.13 2003/01/21 16:06:50 mihad
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// Bug fixes, testcases added.
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// Bug fixes, testcases added.
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//
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//
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// Revision 1.12 2002/10/21 13:04:30 mihad
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// Revision 1.12 2002/10/21 13:04:30 mihad
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// Changed BIST signal names etc..
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// Changed BIST signal names etc..
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| Line 18393... |
Line 18396... |
if ( temp_val1[8] !== 0 )
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if ( temp_val1[8] !== 0 )
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begin
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begin
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$display("Target completion expiration testing failed! Error status bit in PCI error reporting register set for no reason! Time %t ", $time) ;
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$display("Target completion expiration testing failed! Error status bit in PCI error reporting register set for no reason! Time %t ", $time) ;
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test_fail("Error status bit in PCI error reporting register was set for no reason") ;
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test_fail("Error status bit in PCI error reporting register was set for no reason") ;
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end
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end
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// test target retry counter expiration
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// set wb slave to retry response
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// set wb slave to retry response
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wishbone_slave.cycle_response(3'b001, tb_subseq_waits, 8'd255);
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wishbone_slave.cycle_response(3'b001, tb_subseq_waits, 8'd255);
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test_name = "RETRY COUNTER EXPIRATION DURING WRITE THROUGH PCI TARGET UNIT" ;
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test_name = "RETRY COUNTER EXPIRATION DURING WRITE THROUGH PCI TARGET UNIT" ;
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ok_pci = 1 ;
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ok_pci = 1 ;
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fork
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fork
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begin
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begin
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if ( test_mem == 1 )
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if ( test_mem == 1 )
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PCIU_MEM_WRITE ("MEM_WRITE ", `Test_Master_1,
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PCIU_MEM_WRITE ("MEM_WRITE ", `Test_Master_1,
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pci_image_base, 32'hDEAD_BEAF, 4'hA,
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pci_image_base, 32'hBEAF_DEAD, 4'h5,
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1, `Test_One_Zero_Master_WS, `Test_One_Zero_Target_WS,
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1, `Test_One_Zero_Master_WS, `Test_One_Zero_Target_WS,
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`Test_Devsel_Medium, `Test_Target_Normal_Completion);
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`Test_Devsel_Medium, `Test_Target_Normal_Completion);
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else
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else
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PCIU_IO_WRITE( `Test_Master_1, pci_image_base, 32'hDEAD_BEAF, 4'hA, 1, `Test_Target_Normal_Completion) ;
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PCIU_IO_WRITE( `Test_Master_1, pci_image_base, 32'hBEAF_DEAD, 4'h5, 1, `Test_Target_Normal_Completion) ;
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do_pause(1) ;
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do_pause(1) ;
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// do another write with same address and different data
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// do another write with same address and different data
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if ( test_mem == 1 )
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if ( test_mem == 1 )
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PCIU_MEM_WRITE ("MEM_WRITE ", `Test_Master_1,
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PCIU_MEM_WRITE ("MEM_WRITE ", `Test_Master_1,
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pci_image_base, 32'h8765_4321, 4'h0,
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pci_image_base, 32'h1234_5678, 4'h0,
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1, `Test_One_Zero_Master_WS, `Test_One_Zero_Target_WS,
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1, `Test_One_Zero_Master_WS, `Test_One_Zero_Target_WS,
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`Test_Devsel_Medium, `Test_Target_Normal_Completion);
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`Test_Devsel_Medium, `Test_Target_Normal_Completion);
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else
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else
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PCIU_IO_WRITE( `Test_Master_1, pci_image_base, 32'h8765_4321, 4'h0, 1, `Test_Target_Normal_Completion) ;
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PCIU_IO_WRITE( `Test_Master_1, pci_image_base, 32'h1234_5678, 4'h0, 1, `Test_Target_Normal_Completion) ;
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do_pause(1) ;
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do_pause(1) ;
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end
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end
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begin
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begin
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for ( i = 0 ; i < `WB_RTY_CNT_MAX ; i = i + 1 )
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for ( i = 0 ; i < `WB_RTY_CNT_MAX ; i = i + 1 )
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| Line 18489... |
Line 18492... |
begin
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begin
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$display("WISHBONE Master Retry Counter expiration test failed! Invalid value in bus command field in error control and status register when retry counter expired during a write! Time %t", $time) ;
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$display("WISHBONE Master Retry Counter expiration test failed! Invalid value in bus command field in error control and status register when retry counter expired during a write! Time %t", $time) ;
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test_fail("bus command field in error control and status register was wrong when retry counter expired during posted write through PCI Target unit") ;
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test_fail("bus command field in error control and status register was wrong when retry counter expired during posted write through PCI Target unit") ;
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end
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end
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if ( temp_val1[31:28] !== 4'hA )
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if ( temp_val1[31:28] !== 4'h5 )
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begin
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begin
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$display("WISHBONE Master Retry Counter expiration test failed! Invalid value in byte enable field in error control and status register when retry counter expired during a write! Time %t", $time) ;
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$display("WISHBONE Master Retry Counter expiration test failed! Invalid value in byte enable field in error control and status register when retry counter expired during a write! Time %t", $time) ;
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$display("Expected value: %h, actual value %h", 4'h5, temp_val1[31:28]) ;
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test_fail("byte enable field in error control and status register was wrong when retry counter expired during posted write through PCI Target unit") ;
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test_fail("byte enable field in error control and status register was wrong when retry counter expired during posted write through PCI Target unit") ;
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end
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end
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// clear error status register
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// clear error status register
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config_write( pci_err_cs_offset, temp_val1, 4'h2, ok ) ;
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config_write( pci_err_cs_offset, temp_val1, 4'h2, ok ) ;
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| Line 18508... |
Line 18512... |
test_fail("value in error address register was wrong when retry counter expired during posted write through PCI Target unit") ;
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test_fail("value in error address register was wrong when retry counter expired during posted write through PCI Target unit") ;
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end
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end
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test_name = "ERROR DATA REGISTER VALUE CHECK AFTER RETRY COUNTER EXPIRED" ;
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test_name = "ERROR DATA REGISTER VALUE CHECK AFTER RETRY COUNTER EXPIRED" ;
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config_read( pci_err_cs_offset + 8, 4'hF, temp_val1 ) ;
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config_read( pci_err_cs_offset + 8, 4'hF, temp_val1 ) ;
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if ( temp_val1 !== 32'hDEAD_BEAF )
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if ( temp_val1 !== (32'hBEAF_DEAD) )
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begin
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begin
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$display("WISHBONE Master Retry Counter expiration test failed! Invalid value in error data register when retry counter expired during a write! Time %t", $time) ;
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$display("WISHBONE Master Retry Counter expiration test failed! Invalid value in error data register when retry counter expired during a write! Time %t", $time) ;
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$display("Expected value %h, actual %h", 32'hBEAF_DEAD, temp_val1) ;
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test_fail("value in error data register was wrong when retry counter expired during posted write through PCI Target unit") ;
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test_fail("value in error data register was wrong when retry counter expired during posted write through PCI Target unit") ;
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end
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end
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test_name = "RETRY COUNTER EXPIRATION DURING READ THROUGH PCI TARGET UNIT" ;
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test_name = "RETRY COUNTER EXPIRATION DURING READ THROUGH PCI TARGET UNIT" ;
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ok_pci = 1 ;
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ok_pci = 1 ;
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| Line 18611... |
Line 18616... |
begin
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begin
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$display("WISHBONE Master Retry Counter expiration test failed! WB Master shouldn't signal an error when retry counter expires during a read! Time %t", $time) ;
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$display("WISHBONE Master Retry Counter expiration test failed! WB Master shouldn't signal an error when retry counter expires during a read! Time %t", $time) ;
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test_fail("error shouldn't be reported, when retry counter expires during read through PCI Target unit") ;
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test_fail("error shouldn't be reported, when retry counter expires during read through PCI Target unit") ;
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end
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end
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`ifdef PCI_WBM_NO_RESPONSE_CNT_DISABLE
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`else
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test_name = "NO RESPONSE COUNTER EXPIRATION DURING READ THROUGH PCI TARGET UNIT" ;
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test_name = "NO RESPONSE COUNTER EXPIRATION DURING READ THROUGH PCI TARGET UNIT" ;
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$display("PCIU monitor (WB bus) will complain in following section for a few times - no WB response test!") ;
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$display("PCIU monitor (WB bus) will complain in following section for a few times - no WB response test!") ;
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$fdisplay(pciu_mon_log_file_desc,
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$fdisplay(pciu_mon_log_file_desc,
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"******************************************** Monitor should complain in following section for two times about STB de-asserted without slave response ************************************************") ;
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"******************************************** Monitor should complain in following section for two times about STB de-asserted without slave response ************************************************") ;
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ok_pci = 1 ;
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ok_pci = 1 ;
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| Line 18711... |
Line 18719... |
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fork
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fork
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begin
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begin
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if ( test_mem == 1 )
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if ( test_mem == 1 )
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PCIU_MEM_WRITE ("MEM_WRITE ", `Test_Master_1,
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PCIU_MEM_WRITE ("MEM_WRITE ", `Test_Master_1,
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pci_image_base, 32'hBEAF_DEAD, 4'h0,
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pci_image_base, 32'hDEAD_BEAF, 4'hA,
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1, `Test_One_Zero_Master_WS, `Test_One_Zero_Target_WS,
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1, `Test_One_Zero_Master_WS, `Test_One_Zero_Target_WS,
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`Test_Devsel_Medium, `Test_Target_Normal_Completion);
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`Test_Devsel_Medium, `Test_Target_Normal_Completion);
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else
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else
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PCIU_IO_WRITE( `Test_Master_1, pci_image_base, 32'hBEAF_DEAD, 4'h0, 1, `Test_Target_Normal_Completion) ;
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PCIU_IO_WRITE( `Test_Master_1, pci_image_base, 32'hDEAD_BEAF, 4'h0, 1, `Test_Target_Normal_Completion) ;
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do_pause(1) ;
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do_pause(1) ;
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// do another write with same address and different data
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// do another write with same address and different data
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if ( test_mem == 1 )
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if ( test_mem == 1 )
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| Line 18796... |
Line 18804... |
begin
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begin
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$display("WISHBONE Master Retry Counter expiration test failed! Invalid value in bus command field in error control and status register when no response counter expired during a write! Time %t", $time) ;
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$display("WISHBONE Master Retry Counter expiration test failed! Invalid value in bus command field in error control and status register when no response counter expired during a write! Time %t", $time) ;
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test_fail("bus command field in error control and status register was wrong when no response counter expired during posted write through PCI Target unit") ;
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test_fail("bus command field in error control and status register was wrong when no response counter expired during posted write through PCI Target unit") ;
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end
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end
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if ( temp_val1[31:28] !== 4'h0 )
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if ( temp_val1[31:28] !== 4'hA )
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begin
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begin
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$display("WISHBONE Master Retry Counter expiration test failed! Invalid value in byte enable field in error control and status register when no response counter expired during a write! Time %t", $time) ;
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$display("WISHBONE Master Retry Counter expiration test failed! Invalid value in byte enable field in error control and status register when no response counter expired during a write! Time %t", $time) ;
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test_fail("byte enable field in error control and status register was wrong when no response counter expired during posted write through PCI Target unit") ;
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test_fail("byte enable field in error control and status register was wrong when no response counter expired during posted write through PCI Target unit") ;
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end
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end
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| Line 18815... |
Line 18823... |
test_fail("value in error address register was wrong when no response counter expired during posted write through PCI Target unit") ;
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test_fail("value in error address register was wrong when no response counter expired during posted write through PCI Target unit") ;
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end
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end
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test_name = "ERROR DATA REGISTER VALUE CHECK AFTER NO RESPONSE COUNTER EXPIRED" ;
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test_name = "ERROR DATA REGISTER VALUE CHECK AFTER NO RESPONSE COUNTER EXPIRED" ;
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config_read( pci_err_cs_offset + 8, 4'hF, temp_val1 ) ;
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config_read( pci_err_cs_offset + 8, 4'hF, temp_val1 ) ;
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if ( temp_val1 !== 32'hBEAF_DEAD )
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if ( temp_val1 !== 32'hDEAD_BEAF )
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begin
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begin
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$display("WISHBONE Master Retry Counter expiration test failed! Invalid value in error data register when no response counter expired during a write! Time %t", $time) ;
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$display("WISHBONE Master Retry Counter expiration test failed! Invalid value in error data register when no response counter expired during a write! Time %t", $time) ;
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test_fail("value in error data register was wrong when no response counter expired during posted write through PCI Target unit") ;
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test_fail("value in error data register was wrong when no response counter expired during posted write through PCI Target unit") ;
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end
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end
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`endif
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// disable current image - write address mask register
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// disable current image - write address mask register
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config_write( pci_am_offset, 32'h0000_0000, 4'hF, ok ) ;
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config_write( pci_am_offset, 32'h0000_0000, 4'hF, ok ) ;
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end
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end
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endtask // target_completion_expiration
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endtask // target_completion_expiration
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