URL https://opencores.org/ocsvn/pci/pci/trunk

Subversion Repositories pci

[/] [pci/] [tags/] [rel_7/] [rtl/] [verilog/] [pci_bridge32.v] - Diff between revs 2 and 6

Rev 2	Rev 6
Line 41...	Line 41...
`//////////////////////////////////////////////////////////////////////`	`//////////////////////////////////////////////////////////////////////`
`//`	`//`
`// CVS Revision History`	`// CVS Revision History`
`//`	`//`
`// $Log: not supported by cvs2svn $`	`// $Log: not supported by cvs2svn $`
	`// Revision 1.1.1.1 2001/10/02 15:33:46 mihad`
	`// New project directory structure`
	`//`
`//`	`//`

`include "constants.v"	`include "constants.v"
	`include "timescale.v"

`// this is top level module of pci bridge core`	`// this is top level module of pci bridge core`
`// it instantiates and connects other lower level modules`	`// it instantiates and connects other lower level modules`
`// check polarity of PCI output enables in file out_reg.v and change it according to IO interface specification`	`// check polarity of PCI output enables in file out_reg.v and change it according to IO interface specification`