URL https://opencores.org/ocsvn/pci/pci/trunk

Subversion Repositories pci

[/] [pci/] [tags/] [rel_7/] [rtl/] [verilog/] [pci_perr_crit.v] - Diff between revs 77 and 83

Rev 77	Rev 83
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`//////////////////////////////////////////////////////////////////////`	`//////////////////////////////////////////////////////////////////////`
`//`	`//`
`// CVS Revision History`	`// CVS Revision History`
`//`	`//`
`// $Log: not supported by cvs2svn $`	`// $Log: not supported by cvs2svn $`
	`// Revision 1.1 2003/01/27 16:49:31 mihad`
	`// Changed module and file names. Updated scripts accordingly. FIFO synchronizations changed.`
	`//`
`// Revision 1.3 2002/02/01 15:25:13 mihad`	`// Revision 1.3 2002/02/01 15:25:13 mihad`
`// Repaired a few bugs, updated specification, added test bench files and design document`	`// Repaired a few bugs, updated specification, added test bench files and design document`
`//`	`//`
`// Revision 1.2 2001/10/05 08:14:30 mihad`	`// Revision 1.2 2001/10/05 08:14:30 mihad`
`// Updated all files with inclusion of timescale file for simulation purposes.`	`// Updated all files with inclusion of timescale file for simulation purposes.`
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`input non_critical_par_in,`	`input non_critical_par_in,`
`pci_par_in,`	`pci_par_in,`
`perr_generate_in ;`	`perr_generate_in ;`

`assign perr_out = (non_critical_par_in ^^ pci_par_in) && perr_generate_in ;`	`assign perr_out = (non_critical_par_in ^ pci_par_in) && perr_generate_in ;`
`assign perr_n_out = ~perr_out ;`	`assign perr_n_out = ~perr_out ;`

`endmodule`	`endmodule`

`No newline at end of file`	`No newline at end of file`