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//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.2 2002/03/05 11:53:47 mihad
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// Added some testcases, removed un-needed fifo signals
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//
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// Revision 1.1 2002/02/01 14:43:31 mihad
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// Revision 1.1 2002/02/01 14:43:31 mihad
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// *** empty log message ***
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// *** empty log message ***
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//
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//
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//
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//
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Line 90... |
`define ACTIVE_LOW_OE
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`define ACTIVE_LOW_OE
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//`define ACTIVE_HIGH_OE
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//`define ACTIVE_HIGH_OE
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// HOST/GUEST implementation selection - see design document and specification for description of each implementation
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// HOST/GUEST implementation selection - see design document and specification for description of each implementation
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// only one can be defined at same time
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// only one can be defined at same time
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//`define GUEST
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`define GUEST
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`define HOST
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//`define HOST
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// if NO_CNF_IMAGE is commented out, then READ-ONLY access to configuration space is ENABLED:
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// if NO_CNF_IMAGE is commented out, then READ-ONLY access to configuration space is ENABLED:
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// - ENABLED Read-Only access from WISHBONE for GUEST bridges
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// - ENABLED Read-Only access from WISHBONE for GUEST bridges
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// - ENABLED Read-Only access from PCI for HOST bridges
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// - ENABLED Read-Only access from PCI for HOST bridges
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// with defining NO_CNF_IMAGE, one decoder and one multiplexer are saved
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// with defining NO_CNF_IMAGE, one decoder and one multiplexer are saved
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// number defined here specifies how many MS bits in PCI address are compared with base address, to decode
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// number defined here specifies how many MS bits in PCI address are compared with base address, to decode
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// accesses. Maximum number allows for minimum image size ( number = 20, image size = 4KB ), minimum number
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// accesses. Maximum number allows for minimum image size ( number = 20, image size = 4KB ), minimum number
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// allows for maximum image size ( number = 1, image size = 2GB ). If you intend on using different sizes of PCI images,
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// allows for maximum image size ( number = 1, image size = 2GB ). If you intend on using different sizes of PCI images,
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// you have to define a number of minimum sized image and enlarge others by specifying different address mask.
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// you have to define a number of minimum sized image and enlarge others by specifying different address mask.
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// smaller the number here, faster the decoder operation
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// smaller the number here, faster the decoder operation
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`define PCI_NUM_OF_DEC_ADDR_LINES 3
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`define PCI_NUM_OF_DEC_ADDR_LINES 20
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// no. of PCI Target IMAGES
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// no. of PCI Target IMAGES
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// - PCI provides 6 base address registers for image implementation.
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// - PCI provides 6 base address registers for image implementation.
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// PCI_IMAGE1 definition is not required and has no effect, since PCI image 1 is always implemented
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// PCI_IMAGE1 definition is not required and has no effect, since PCI image 1 is always implemented
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// If GUEST is defined, PCI Image 0 is also always implemented and is used for configuration space
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// If GUEST is defined, PCI Image 0 is also always implemented and is used for configuration space
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`ifdef NO_CNF_IMAGE
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`ifdef NO_CNF_IMAGE
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`define PCI_IMAGE0
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`define PCI_IMAGE0
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`endif
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`endif
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`endif
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`endif
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//`define PCI_IMAGE2
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`define PCI_IMAGE2
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`define PCI_IMAGE3
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`define PCI_IMAGE3
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//`define PCI_IMAGE4
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`define PCI_IMAGE4
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`define PCI_IMAGE5
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`define PCI_IMAGE5
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// initial value for PCI image address masks. Address masks can be defined in enabled state,
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// initial value for PCI image address masks. Address masks can be defined in enabled state,
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// to allow device independent software to detect size of image and map base addresses to
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// to allow device independent software to detect size of image and map base addresses to
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// memory space. If initial mask for an image is defined as 0, then device independent software
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// memory space. If initial mask for an image is defined as 0, then device independent software
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// won't detect base address implemented and device dependent software will have to configure
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// won't detect base address implemented and device dependent software will have to configure
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// address masks as well as base addresses!
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// address masks as well as base addresses!
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`define PCI_AM0 20'hffff_f
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`define PCI_AM0 20'hffff_e
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`define PCI_AM1 20'hffff_f
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`define PCI_AM1 20'hffff_c
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`define PCI_AM2 20'hffff_f
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`define PCI_AM2 20'hffff_8
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`define PCI_AM3 20'hffff_f
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`define PCI_AM3 20'hffff_0
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`define PCI_AM4 20'hffff_f
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`define PCI_AM4 20'hfffe_0
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`define PCI_AM5 20'hffff_f
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`define PCI_AM5 20'h0000_0
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// initial value for PCI image maping to MEMORY or IO spaces. If initial define is set to 0,
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// initial value for PCI image maping to MEMORY or IO spaces. If initial define is set to 0,
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// then IMAGE with that base address points to MEMORY space, othervise it points ti IO space. D
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// then IMAGE with that base address points to MEMORY space, othervise it points ti IO space. D
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// Device independent software sets the base addresses acording to MEMORY or IO maping!
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// Device independent software sets the base addresses acording to MEMORY or IO maping!
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`define PCI_BA0_MEM_IO 1'b0 // considered only when PCI_IMAGE0 is used as general PCI-WB image!
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`define PCI_BA0_MEM_IO 1'b0 // considered only when PCI_IMAGE0 is used as general PCI-WB image!
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`define PCI_BA1_MEM_IO 1'b0
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`define PCI_BA1_MEM_IO 1'b1
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`define PCI_BA2_MEM_IO 1'b0
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`define PCI_BA2_MEM_IO 1'b0
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`define PCI_BA3_MEM_IO 1'b0
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`define PCI_BA3_MEM_IO 1'b1
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`define PCI_BA4_MEM_IO 1'b0
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`define PCI_BA4_MEM_IO 1'b0
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`define PCI_BA5_MEM_IO 1'b0
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`define PCI_BA5_MEM_IO 1'b1
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// number defined here specifies how many MS bits in WB address are compared with base address, to decode
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// number defined here specifies how many MS bits in WB address are compared with base address, to decode
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// accesses. Maximum number allows for minimum image size ( number = 20, image size = 4KB ), minimum number
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// accesses. Maximum number allows for minimum image size ( number = 20, image size = 4KB ), minimum number
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// allows for maximum image size ( number = 1, image size = 2GB ). If you intend on using different sizes of WB images,
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// allows for maximum image size ( number = 1, image size = 2GB ). If you intend on using different sizes of WB images,
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// you have to define a number of minimum sized image and enlarge others by specifying different address mask.
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// you have to define a number of minimum sized image and enlarge others by specifying different address mask.
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//`define WB_DECODE_FAST
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//`define WB_DECODE_FAST
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`define WB_DECODE_MEDIUM
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`define WB_DECODE_MEDIUM
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//`define WB_DECODE_SLOW
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//`define WB_DECODE_SLOW
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// Base address for Configuration space access from WB bus. This value cannot be changed during runtime
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// Base address for Configuration space access from WB bus. This value cannot be changed during runtime
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`define WB_CONFIGURATION_BASE 20'h0000_0
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`define WB_CONFIGURATION_BASE 20'hF300_0
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// Turn registered WISHBONE slave outputs on or off
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// Turn registered WISHBONE slave outputs on or off
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// all outputs from WB Slave state machine are registered, if this is defined - WB bus outputs as well as
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// all outputs from WB Slave state machine are registered, if this is defined - WB bus outputs as well as
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// outputs to internals of the core.
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// outputs to internals of the core.
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//`define REGISTER_WBS_OUTPUTS
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//`define REGISTER_WBS_OUTPUTS
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