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[/] [pci/] [tags/] [rel_9/] [rtl/] [verilog/] [pci_user_constants.v] - Diff between revs 79 and 86
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//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.7 2003/01/27 17:05:50 mihad
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// Updated.
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//
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// Revision 1.6 2003/01/27 16:51:19 mihad
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// Revision 1.6 2003/01/27 16:51:19 mihad
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// Old files with wrong names removed.
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// Old files with wrong names removed.
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//
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//
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// Revision 1.5 2003/01/21 16:06:56 mihad
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// Revision 1.5 2003/01/21 16:06:56 mihad
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// Bug fixes, testcases added.
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// Bug fixes, testcases added.
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// MAX Retry counter value for WISHBONE Master state-machine
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// MAX Retry counter value for WISHBONE Master state-machine
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// This value is 8-bit because of 8-bit retry counter !!!
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// This value is 8-bit because of 8-bit retry counter !!!
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`define WB_RTY_CNT_MAX 8'hff
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`define WB_RTY_CNT_MAX 8'hff
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// define the macro below to disable internal retry generation in the wishbone master interface
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// used when wb master accesses extremly slow devices.
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`define PCI_WBM_NO_RESPONSE_CNT_DISABLE
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