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[/] [pci/] [trunk/] [rtl/] [verilog/] [pci_bridge32.v] - Diff between revs 106 and 108

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Rev 106 Rev 108
Line 41... Line 41...
//////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////
//
//
// CVS Revision History
// CVS Revision History
//
//
// $Log: not supported by cvs2svn $
// $Log: not supported by cvs2svn $
 
// Revision 1.10  2003/08/03 18:05:06  mihad
 
// Added limited WISHBONE B3 support for WISHBONE Slave Unit.
 
// Doesn't support full speed bursts yet.
 
//
// Revision 1.9  2003/01/27 16:49:31  mihad
// Revision 1.9  2003/01/27 16:49:31  mihad
// Changed module and file names. Updated scripts accordingly. FIFO synchronizations changed.
// Changed module and file names. Updated scripts accordingly. FIFO synchronizations changed.
//
//
// Revision 1.8  2002/10/21 13:04:33  mihad
// Revision 1.8  2002/10/21 13:04:33  mihad
// Changed BIST signal names etc..
// Changed BIST signal names etc..
Line 994... Line 998...
wire            pciu_pciif_frame_reg_in                 =   in_reg_frame_out ;
wire            pciu_pciif_frame_reg_in                 =   in_reg_frame_out ;
wire            pciu_pciif_irdy_reg_in                  =   in_reg_irdy_out ;
wire            pciu_pciif_irdy_reg_in                  =   in_reg_irdy_out ;
wire            pciu_pciif_idsel_reg_in                 =   in_reg_idsel_out ;
wire            pciu_pciif_idsel_reg_in                 =   in_reg_idsel_out ;
wire    [31:0]  pciu_pciif_ad_reg_in                    =   in_reg_ad_out ;
wire    [31:0]  pciu_pciif_ad_reg_in                    =   in_reg_ad_out ;
wire    [3:0]   pciu_pciif_cbe_reg_in                   =   in_reg_cbe_out ;
wire    [3:0]   pciu_pciif_cbe_reg_in                   =   in_reg_cbe_out ;
 
wire    [3:0]   pciu_pciif_cbe_in                       =   pci_cbe_i ;
 
 
wire            pciu_pciif_bckp_trdy_en_in              =   out_bckp_trdy_en_out ;
wire            pciu_pciif_bckp_trdy_en_in              =   out_bckp_trdy_en_out ;
wire            pciu_pciif_bckp_devsel_in               =   out_bckp_devsel_out ;
wire            pciu_pciif_bckp_devsel_in               =   out_bckp_devsel_out ;
wire            pciu_pciif_bckp_trdy_in                 =   out_bckp_trdy_out ;
wire            pciu_pciif_bckp_trdy_in                 =   out_bckp_trdy_out ;
wire            pciu_pciif_bckp_stop_in                 =   out_bckp_stop_out ;
wire            pciu_pciif_bckp_stop_in                 =   out_bckp_stop_out ;
Line 1055... Line 1060...
    .pciu_pciif_frame_reg_in        (pciu_pciif_frame_reg_in),
    .pciu_pciif_frame_reg_in        (pciu_pciif_frame_reg_in),
    .pciu_pciif_irdy_reg_in         (pciu_pciif_irdy_reg_in),
    .pciu_pciif_irdy_reg_in         (pciu_pciif_irdy_reg_in),
    .pciu_pciif_idsel_reg_in        (pciu_pciif_idsel_reg_in),
    .pciu_pciif_idsel_reg_in        (pciu_pciif_idsel_reg_in),
    .pciu_pciif_ad_reg_in           (pciu_pciif_ad_reg_in),
    .pciu_pciif_ad_reg_in           (pciu_pciif_ad_reg_in),
    .pciu_pciif_cbe_reg_in          (pciu_pciif_cbe_reg_in),
    .pciu_pciif_cbe_reg_in          (pciu_pciif_cbe_reg_in),
 
    .pciu_pciif_cbe_in              (pciu_pciif_cbe_in),
    .pciu_pciif_bckp_trdy_en_in     (pciu_pciif_bckp_trdy_en_in),
    .pciu_pciif_bckp_trdy_en_in     (pciu_pciif_bckp_trdy_en_in),
    .pciu_pciif_bckp_devsel_in      (pciu_pciif_bckp_devsel_in),
    .pciu_pciif_bckp_devsel_in      (pciu_pciif_bckp_devsel_in),
    .pciu_pciif_bckp_trdy_in        (pciu_pciif_bckp_trdy_in),
    .pciu_pciif_bckp_trdy_in        (pciu_pciif_bckp_trdy_in),
    .pciu_pciif_bckp_stop_in        (pciu_pciif_bckp_stop_in),
    .pciu_pciif_bckp_stop_in        (pciu_pciif_bckp_stop_in),
    .pciu_pciif_trdy_reg_in         (pciu_pciif_trdy_reg_in),
    .pciu_pciif_trdy_reg_in         (pciu_pciif_trdy_reg_in),

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