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[/] [pci/] [trunk/] [rtl/] [verilog/] [pci_constants.v] - Diff between revs 18 and 132

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Rev 18 Rev 132
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//////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////
//
//
// CVS Revision History
// CVS Revision History
//
//
// $Log: not supported by cvs2svn $
// $Log: not supported by cvs2svn $
 
// Revision 1.1  2002/02/01 14:43:31  mihad
 
// *** empty log message ***
 
//
// Revision 1.2  2001/10/05 08:14:28  mihad
// Revision 1.2  2001/10/05 08:14:28  mihad
// Updated all files with inclusion of timescale file for simulation purposes.
// Updated all files with inclusion of timescale file for simulation purposes.
//
//
// Revision 1.1.1.1  2001/10/02 15:33:46  mihad
// Revision 1.1.1.1  2001/10/02 15:33:46  mihad
// New project directory structure
// New project directory structure
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// PCI target & WB slave ADDRESS names for configuration space !!!
// PCI target & WB slave ADDRESS names for configuration space !!!
// This does not include address offsets of PCI Header registers - they starts at offset 0 (see PCI spec.)
// This does not include address offsets of PCI Header registers - they starts at offset 0 (see PCI spec.)
//   ALL VALUES are without 2 LSBits AND there is required that address bit [8] is set while
//   ALL VALUES are without 2 LSBits AND there is required that address bit [8] is set while
//   accessing this registers, otherwise the configuration header will be accessed !!!
//   accessing this registers, otherwise the configuration header will be accessed !!!
 
`define PCI_CAP_PTR_VAL         8'h80
`define P_IMG_CTRL0_ADDR                6'h00   //      Address offset = h 100
`define P_IMG_CTRL0_ADDR                6'h00   //      Address offset = h 100
`define P_BA0_ADDR                              6'h01   //      Address offset = h 104
`define P_BA0_ADDR                              6'h01   //      Address offset = h 104
`define P_AM0_ADDR                              6'h02   //      Address offset = h 108
`define P_AM0_ADDR                              6'h02   //      Address offset = h 108
`define P_TA0_ADDR                              6'h03   //      Address offset = h 10c
`define P_TA0_ADDR                              6'h03   //      Address offset = h 10c
`define P_IMG_CTRL1_ADDR        6'h04   //      Address offset = h 110
`define P_IMG_CTRL1_ADDR        6'h04   //      Address offset = h 110

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