URL
https://opencores.org/ocsvn/pci/pci/trunk
[/] [pci/] [trunk/] [rtl/] [verilog/] [pci_wbw_wbr_fifos.v] - Diff between revs 88 and 111
Go to most recent revision |
Show entire file |
Details |
Blame |
View Log
| Rev 88 |
Rev 111 |
| Line 40... |
Line 40... |
//////////////////////////////////////////////////////////////////////
|
//////////////////////////////////////////////////////////////////////
|
//
|
//
|
// CVS Revision History
|
// CVS Revision History
|
//
|
//
|
// $Log: not supported by cvs2svn $
|
// $Log: not supported by cvs2svn $
|
|
// Revision 1.3 2003/03/26 13:16:18 mihad
|
|
// Added the reset value parameter to the synchronizer flop module.
|
|
// Added resets to all synchronizer flop instances.
|
|
// Repaired initial sync value in fifos.
|
|
//
|
// Revision 1.2 2003/01/30 22:01:09 mihad
|
// Revision 1.2 2003/01/30 22:01:09 mihad
|
// Updated synchronization in top level fifo modules.
|
// Updated synchronization in top level fifo modules.
|
//
|
//
|
// Revision 1.1 2003/01/27 16:49:31 mihad
|
// Revision 1.1 2003/01/27 16:49:31 mihad
|
// Changed module and file names. Updated scripts accordingly. FIFO synchronizations changed.
|
// Changed module and file names. Updated scripts accordingly. FIFO synchronizations changed.
|
| Line 536... |
Line 541... |
inGreyCount <= #`FF_DELAY inNextGreyCount ;
|
inGreyCount <= #`FF_DELAY inNextGreyCount ;
|
end
|
end
|
|
|
wire [(WBW_ADDR_LENGTH-2):0] pci_clk_sync_inGreyCount ;
|
wire [(WBW_ADDR_LENGTH-2):0] pci_clk_sync_inGreyCount ;
|
reg [(WBW_ADDR_LENGTH-2):0] pci_clk_inGreyCount ;
|
reg [(WBW_ADDR_LENGTH-2):0] pci_clk_inGreyCount ;
|
synchronizer_flop #((WBW_ADDR_LENGTH - 1), 0) i_synchronizer_reg_inGreyCount
|
pci_synchronizer_flop #((WBW_ADDR_LENGTH - 1), 0) i_synchronizer_reg_inGreyCount
|
(
|
(
|
.data_in (inGreyCount),
|
.data_in (inGreyCount),
|
.clk_out (pci_clock_in),
|
.clk_out (pci_clock_in),
|
.sync_data_out (pci_clk_sync_inGreyCount),
|
.sync_data_out (pci_clk_sync_inGreyCount),
|
.async_reset (wbw_clear)
|
.async_reset (wbw_clear)
|
© copyright 1999-2025
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.