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https://opencores.org/ocsvn/pcie_ds_dma/pcie_ds_dma/trunk
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-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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--
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--
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-- Version 1.1 19.06.2012
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-- Version 1.1 19.06.2012
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-- Исправлено формирование cpl_byte_count
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-- Исправлено формирование cpl_byte_count
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--
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--
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-- 12.04.2013
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-- Fixed cpl_byte_count
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--
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-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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library ieee;
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_1164.all;
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tlp_dw0 <= "0" & rx_tx_engine.request_reg_rd & "0010100" & rx_tx_engine.request_tc & "0000" & rx_tx_engine.request_attr & "0000" & "0000000" & rx_tx_engine.request_reg_rd;
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tlp_dw0 <= "0" & rx_tx_engine.request_reg_rd & "0010100" & rx_tx_engine.request_tc & "0000" & rx_tx_engine.request_attr & "0000" & "0000000" & rx_tx_engine.request_reg_rd;
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tlp_dw1 <= completer_id & cpl_status & '0' & cpl_byte_count;
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tlp_dw1 <= completer_id & cpl_status & '0' & cpl_byte_count;
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tlp_dw2 <= rx_tx_engine.request_id & rx_tx_engine.request_tag & '0' & rx_tx_engine.lower_adr & "00";
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tlp_dw2 <= rx_tx_engine.request_id & rx_tx_engine.request_tag & '0' & rx_tx_engine.lower_adr & "00";
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cpl_byte_count <= "0000" & "0000" & "0" & rx_tx_engine.request_reg_rd & "00";
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--cpl_byte_count <= "0000" & "0000" & "0" & rx_tx_engine.request_reg_rd & "00";
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cpl_byte_count <= "0000" & "0000" & "0" & rx_tx_engine.byte_count;
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cpl_byte_count <= "0000" & "0000" & "0" & rx_tx_engine.byte_count;
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reg_data <= reg_access_back.data after 1 ns when rising_edge( clk ) and reg_access_back.data_we='1';
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reg_data <= reg_access_back.data after 1 ns when rising_edge( clk ) and reg_access_back.data_we='1';
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tlp_dw3( 7 downto 0 ) <= reg_data( 31 downto 24 );
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tlp_dw3( 7 downto 0 ) <= reg_data( 31 downto 24 );
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tlp_dw3( 15 downto 8 ) <= reg_data( 23 downto 16 );
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tlp_dw3( 15 downto 8 ) <= reg_data( 23 downto 16 );
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