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https://opencores.org/ocsvn/pcie_ds_dma/pcie_ds_dma/trunk
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[file:.\src\pcie_src\pcie_core64_m1\pcie_ctrl\core64_pb_disp.vhd]
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[file:.\src\pcie_src\pcie_core64_m1\pcie_ctrl\core64_pb_disp.vhd]
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Enabled=1
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Enabled=1
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[file:.\src\pcie_src\pcie_core64_m1\pcie_ctrl\core64_reg_access.vhd]
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[file:.\src\pcie_src\pcie_core64_m1\pcie_ctrl\core64_reg_access.vhd]
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Enabled=1
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Enabled=1
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[file:.\src\pcie_src\pcie_core64_m1\pcie_ctrl\core64_rx_engine.vhd]
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[file:.\src\pcie_src\pcie_core64_m1\pcie_ctrl\core64_rx_engine.vhd]
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Enabled=1
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Enabled=0
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[file:.\src\pcie_src\pcie_core64_m1\pcie_ctrl\core64_rx_engine_m2.vhd]
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[file:.\src\pcie_src\pcie_core64_m1\pcie_ctrl\core64_rx_engine_m2.vhd]
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Enabled=1
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Enabled=0
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[file:.\src\pcie_src\pcie_core64_m1\pcie_ctrl\core64_rx_engine_m4.vhd]
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[file:.\src\pcie_src\pcie_core64_m1\pcie_ctrl\core64_rx_engine_m4.vhd]
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Enabled=1
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Enabled=1
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[file:.\src\pcie_src\pcie_core64_m1\pcie_ctrl\core64_tx_engine.vhd]
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[file:.\src\pcie_src\pcie_core64_m1\pcie_ctrl\core64_tx_engine.vhd]
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Enabled=1
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Enabled=0
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[file:.\src\pcie_src\pcie_core64_m1\pcie_ctrl\core64_tx_engine_m2.vhd]
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[file:.\src\pcie_src\pcie_core64_m1\pcie_ctrl\core64_tx_engine_m2.vhd]
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Enabled=1
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Enabled=0
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[file:.\src\pcie_src\pcie_core64_m1\pcie_ctrl\core64_tx_engine_m4.vhd]
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[file:.\src\pcie_src\pcie_core64_m1\pcie_ctrl\core64_tx_engine_m4.vhd]
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Enabled=1
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Enabled=1
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[file:.\src\pcie_src\pcie_core64_m1\source_s6\cl_s6pcie_m2.vhd]
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[file:.\src\pcie_src\pcie_core64_m1\source_s6\cl_s6pcie_m2.vhd]
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Enabled=1
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Enabled=1
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[file:.\src\pcie_src\pcie_core64_m1\source_s6\gtpa1_dual_wrapper.vhd]
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[file:.\src\pcie_src\pcie_core64_m1\source_s6\gtpa1_dual_wrapper.vhd]
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Enabled=1
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Enabled=1
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[file:.\src\testbench\ahdl\rx.awf]
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[file:.\src\testbench\ahdl\rx.awf]
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Enabled=1
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Enabled=1
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[file:.\src\testbench\ahdl\tx.awf]
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[file:.\src\testbench\ahdl\tx.awf]
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Enabled=1
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Enabled=1
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[file:.\src\testbench\ahdl\run_ahdl.tcl]
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Enabled=1
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