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Line 148... |
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###############################################################################
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###############################################################################
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# End
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# End
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###############################################################################
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###############################################################################
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INST "WB_SOPC/PCIE_CORE64_WB/CORE/ep" AREA_GROUP = "pblock_ep";
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#INST "amb/gen_syn.pcie/core/reg" AREA_GROUP = "pblock_reg";
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AREA_GROUP "pblock_ep" RANGE=SLICE_X4Y96:SLICE_X7Y125;
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#AREA_GROUP "pblock_reg" RANGE=SLICE_X20Y89:SLICE_X25Y95;
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AREA_GROUP "pblock_ep" RANGE=RAMB16_X0Y48:RAMB16_X0Y62;
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#INST "amb/gen_syn.pcie/core/int" AREA_GROUP = "pblock_int";
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AREA_GROUP "pblock_ep" RANGE=RAMB8_X0Y48:RAMB8_X0Y63;
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#AREA_GROUP "pblock_int" RANGE=SLICE_X26Y88:SLICE_X29Y95;
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INST "WB_SOPC/PCIE_CORE64_WB/CORE/rx" AREA_GROUP = "pblock_rx";
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#INST "amb/gen_syn.pcie/core/tx" AREA_GROUP = "pblock_tx";
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AREA_GROUP "pblock_rx" RANGE=SLICE_X8Y111:SLICE_X17Y88;
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#AREA_GROUP "pblock_tx" RANGE=SLICE_X8Y96:SLICE_X13Y111;
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INST "WB_SOPC/PCIE_CORE64_WB/CORE/tx" AREA_GROUP = "pblock_tx";
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#INST "amb/gen_syn.pcie/core/disp" AREA_GROUP = "pblock_disp";
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AREA_GROUP "pblock_tx" RANGE=SLICE_X20Y88:SLICE_X29Y111;
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#AREA_GROUP "pblock_disp" RANGE=SLICE_X20Y80:SLICE_X25Y87;
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INST "WB_SOPC/PCIE_CORE64_WB/CORE/reg" AREA_GROUP = "pblock_reg";
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#INST "amb/gen_syn.pcie/core/fifo" AREA_GROUP = "pblock_fifo";
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AREA_GROUP "pblock_reg" RANGE=SLICE_X18Y85:SLICE_X19Y95, SLICE_X12Y85:SLICE_X17Y87;
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#AREA_GROUP "pblock_fifo" RANGE=SLICE_X8Y80:SLICE_X19Y95, SLICE_X0Y64:SLICE_X7Y95;
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INST "WB_SOPC/PCIE_CORE64_WB/CORE/int" AREA_GROUP = "pblock_int";
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#AREA_GROUP "pblock_fifo" RANGE=DSP48_X0Y16:DSP48_X0Y23;
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AREA_GROUP "pblock_int" RANGE=SLICE_X0Y122:SLICE_X3Y125;
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#AREA_GROUP "pblock_fifo" RANGE=RAMB16_X1Y40:RAMB16_X1Y46, RAMB16_X0Y32:RAMB16_X0Y46;
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INST "WB_SOPC/PCIE_CORE64_WB/CORE/disp" AREA_GROUP = "pblock_disp";
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#AREA_GROUP "pblock_fifo" RANGE=RAMB8_X1Y40:RAMB8_X1Y47, RAMB8_X0Y32:RAMB8_X0Y47;
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AREA_GROUP "pblock_disp" RANGE=SLICE_X20Y87:SLICE_X29Y83;
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#INST "amb/gen_syn.pcie/core/ep" AREA_GROUP = "pblock_ep";
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INST "WB_SOPC/PCIE_CORE64_WB/CORE/fifo" AREA_GROUP = "pblock_fifo";
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#AREA_GROUP "pblock_ep" RANGE=SLICE_X0Y112:SLICE_X3Y125;
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AREA_GROUP "pblock_fifo" RANGE=SLICE_X18Y72:SLICE_X29Y82, SLICE_X8Y72:SLICE_X17Y84, SLICE_X2Y72:SLICE_X7Y95;
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#AREA_GROUP "pblock_ep" RANGE=RAMB16_X0Y48:RAMB16_X0Y62;
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AREA_GROUP "pblock_fifo" RANGE=RAMB16_X0Y36:RAMB16_X1Y46;
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#AREA_GROUP "pblock_ep" RANGE=RAMB8_X0Y48:RAMB8_X0Y63;
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AREA_GROUP "pblock_fifo" RANGE=RAMB8_X0Y36:RAMB8_X1Y47;
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#INST "amb/gen_syn.pcie/main" AREA_GROUP = "pblock_main";
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INST "WB_SOPC/PCIE_CORE64_WB/PE_MAIN" AREA_GROUP = "pblock_PE_MAIN";
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#AREA_GROUP "pblock_main" RANGE=SLICE_X26Y80:SLICE_X29Y86;
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AREA_GROUP "pblock_PE_MAIN" RANGE=SLICE_X24Y119:SLICE_X29Y113;
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#INST "amb/gen_syn.pcie/tz" AREA_GROUP = "pblock_tz";
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INST "WB_SOPC/PCIE_CORE64_WB/PW_WB" AREA_GROUP = "pblock_PW_WB";
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#AREA_GROUP "pblock_tz" RANGE=SLICE_X20Y75:SLICE_X29Y79;
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AREA_GROUP "pblock_PW_WB" RANGE=SLICE_X4Y68:SLICE_X21Y71;
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#INST "amb/gen_syn.blink" AREA_GROUP = "pblock_gen_syn.blink";
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INST "WB_SOPC/WB_CROSS" AREA_GROUP = "pblock_WB_CROSS";
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#AREA_GROUP "pblock_gen_syn.blink" RANGE=SLICE_X4Y112:SLICE_X7Y119;
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AREA_GROUP "pblock_WB_CROSS" RANGE=SLICE_X4Y56:SLICE_X21Y67;
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#INST "amb/gen_syn.ad" AREA_GROUP = "pblock_gen_syn.ad";
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INST "WB_SOPC/TEST_CHECK" AREA_GROUP = "pblock_TEST_CHECK";
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#AREA_GROUP "pblock_gen_syn.ad" RANGE=SLICE_X20Y64:SLICE_X29Y74, SLICE_X8Y64:SLICE_X19Y79;
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AREA_GROUP "pblock_TEST_CHECK" RANGE=SLICE_X4Y24:SLICE_X17Y55;
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#AREA_GROUP "pblock_gen_syn.ad" RANGE=RAMB16_X1Y38:RAMB16_X1Y38, RAMB16_X1Y32:RAMB16_X1Y34;
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AREA_GROUP "pblock_TEST_CHECK" RANGE=RAMB16_X0Y12:RAMB16_X0Y26;
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#AREA_GROUP "pblock_gen_syn.ad" RANGE=RAMB8_X1Y38:RAMB8_X1Y39, RAMB8_X1Y32:RAMB8_X1Y35;
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AREA_GROUP "pblock_TEST_CHECK" RANGE=RAMB8_X0Y12:RAMB8_X0Y27;
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#INST "test_ctrl" AREA_GROUP = "pblock_test_ctrl";
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INST "WB_SOPC/TEST_GEN" AREA_GROUP = "pblock_TEST_GEN";
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#AREA_GROUP "pblock_test_ctrl" RANGE=SLICE_X0Y16:SLICE_X27Y47;
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AREA_GROUP "pblock_TEST_GEN" RANGE=SLICE_X18Y24:SLICE_X27Y55;
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#INST "dio_in" AREA_GROUP = "pblock_dio_in";
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AREA_GROUP "pblock_TEST_GEN" RANGE=RAMB16_X1Y12:RAMB16_X1Y26;
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#AREA_GROUP "pblock_dio_in" RANGE=SLICE_X0Y48:SLICE_X9Y63;
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AREA_GROUP "pblock_TEST_GEN" RANGE=RAMB8_X1Y12:RAMB8_X1Y27;
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#AREA_GROUP "pblock_dio_in" RANGE=DSP48_X0Y12:DSP48_X0Y15;
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#AREA_GROUP "pblock_dio_in" RANGE=RAMB16_X0Y24:RAMB16_X0Y30;
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#AREA_GROUP "pblock_dio_in" RANGE=RAMB8_X0Y24:RAMB8_X0Y31;
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#INST "main" AREA_GROUP = "pblock_main_1";
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#AREA_GROUP "pblock_main_1" RANGE=SLICE_X24Y48:SLICE_X29Y63;
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#INST "dio_out" AREA_GROUP = "pblock_dio_out";
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#AREA_GROUP "pblock_dio_out" RANGE=SLICE_X14Y48:SLICE_X23Y63;
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#AREA_GROUP "pblock_dio_out" RANGE=RAMB16_X1Y24:RAMB16_X1Y30;
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#AREA_GROUP "pblock_dio_out" RANGE=RAMB8_X1Y24:RAMB8_X1Y31;
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#INST "amb/gen_syn.pcie/core/rx" AREA_GROUP = "pblock_rx";
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#AREA_GROUP "pblock_rx" RANGE=SLICE_X0Y96:SLICE_X7Y111;
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AREA_GROUP "pblock_TEST_GEN" RANGE=RAMB8_X1Y12:RAMB8_X1Y27;
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