Line 62... |
Line 62... |
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void WB_TestStrm::Prepare( void )
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void WB_TestStrm::Prepare( void )
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{
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{
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PrepareAdm();
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PrepareWb();
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rd0.trd=trdNo;
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rd0.trd=trdNo;
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rd0.Strm=strmNo;
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rd0.Strm=strmNo;
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pBrd->StreamInit( rd0.Strm, CntBuffer, SizeBuferOfBytes, rd0.trd, 1, isCycle, isSystem, isAgreeMode );
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// pBrd->StreamInit( rd0.Strm, CntBuffer, SizeBuferOfBytes, rd0.trd, 1, isCycle, isSystem, isAgreeMode );
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bufIsvi = new U32[SizeBlockOfWords*2];
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bufIsvi = new U32[SizeBlockOfWords*2];
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//pBrd->StreamInit( strm, CntBuffer, SizeBuferOfBytes, rd0.trd, 1, 0, 0 );
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pBrd->StreamInit( rd0.Strm, CntBuffer, SizeBuferOfBytes, U32(0x3000),U32(1), 0, 1, U32(0) );
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}
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}
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void WB_TestStrm::Start( void )
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void WB_TestStrm::Start( void )
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{
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{
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int res = pthread_attr_init(&attrThread_);
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int res = pthread_attr_init(&attrThread_);
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Line 133... |
Line 133... |
//BRDC_fprintf( stderr, "%10s %10d %10d %10d %10d\n", "PACKAGE :", pkg_out.BlockWr, pkg_in.BlockRd, pkg_in.BlockOk, pkg_in.BlockError );
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//BRDC_fprintf( stderr, "%10s %10d %10d %10d %10d\n", "PACKAGE :", pkg_out.BlockWr, pkg_in.BlockRd, pkg_in.BlockOk, pkg_in.BlockError );
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//BRDC_fprintf( stderr, "%10s %10d %10d %10d %10d\n", "FIFO_0 :", tr0.BlockWr, rd0.BlockRd, rd0.BlockOk, rd0.BlockError );
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//BRDC_fprintf( stderr, "%10s %10d %10d %10d %10d\n", "FIFO_0 :", tr0.BlockWr, rd0.BlockRd, rd0.BlockOk, rd0.BlockError );
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//BRDC_fprintf( stderr, "%10s %10d %10d %10d %10d\n", "FIFO_1 :", tr1.BlockWr, rd1.BlockRd, rd1.BlockOk, rd1.BlockError );
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//BRDC_fprintf( stderr, "%10s %10d %10d %10d %10d\n", "FIFO_1 :", tr1.BlockWr, rd1.BlockRd, rd1.BlockOk, rd1.BlockError );
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U32 status = 0; //pBrd->RegPeekDir( rd0.trd, 0 ) & 0xFFFF;
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U32 status = 0; //pBrd->RegPeekDir( rd0.trd, 0 ) & 0xFFFF;
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BRDC_fprintf( stderr, "%6s %3d %10d %10d %10d %10d %9.1f %10.1f 0x%.4X %d %4d %4f\r", "TRD :", rd0.trd, rd0.BlockWr, rd0.BlockRd, rd0.BlockOk, rd0.BlockError, rd0.VelocityCurrent, rd0.VelocityAvarage, status, IsviStatus, IsviCnt, rd0.fftTime_us );
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rd0.BlockWr=pBrd->wb_block_read( 1, 0x11 );
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BRDC_fprintf( stdout, "%6s %3d %10d %10d %10d %10d %9.1f %10.1f 0x%.4X %d %4d %4f\r", "TRD :", rd0.trd, rd0.BlockWr, rd0.BlockRd, rd0.BlockOk, rd0.BlockError, rd0.VelocityCurrent, rd0.VelocityAvarage, status, IsviStatus, IsviCnt, rd0.fftTime_us );
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}
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}
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Line 287... |
Line 289... |
if( isAdmReg2 )
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if( isAdmReg2 )
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PrepareAdmReg( fnameAdmReg2 );
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PrepareAdmReg( fnameAdmReg2 );
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pBrd->RegPokeInd( 4, 0, 0x2038 );
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pBrd->RegPokeInd( 4, 0, 0x2038 );
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*/
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*/
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pBrd->StreamStart( rd0.Strm );
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U32 val;
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val=pBrd->wb_block_read( 1, 0 );
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BRDC_fprintf( stderr, "ID=0x%.4X \n", val );
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val=pBrd->wb_block_read( 1, 1 );
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BRDC_fprintf( stderr, "VER=0x%.4X \n", val );
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val=pBrd->wb_block_read( 1, 8 );
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BRDC_fprintf( stderr, "GEN_CTRL=0x%.4X \n", val );
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pBrd->wb_block_write( 1, 9, 5 );
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pBrd->wb_block_write( 1, 8, 0x6A0 );
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val=pBrd->wb_block_read( 1, 8 );
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BRDC_fprintf( stderr, "GEN_CTRL=0x%.4X \n", val );
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rd0.time_last=rd0.time_start=0 ;//GetTickCount();
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rd0.time_last=rd0.time_start=0 ;//GetTickCount();
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for( ; ; )
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for( ; ; )
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{
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{
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Line 332... |
Line 352... |
//return;
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//return;
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for( kk=0; kk<16; kk++ )
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for( kk=0; kk<16; kk++ )
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{
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{
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ret=pBrd->StreamGetBuf( pr->Strm, &ptr );
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ret=pBrd->StreamGetBuf( pr->Strm, &ptr );
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//ret=0;
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if( ret )
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if( ret )
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{ // Проверка буфера стрима
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{ // Проверка буфера стрима
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for( unsigned ii=0; ii<CntBlockInBuffer; ii++ )
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for( unsigned ii=0; ii<CntBlockInBuffer; ii++ )
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{
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{
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Line 393... |
Line 414... |
*/
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*/
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}
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}
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void WB_TestStrm::PrepareAdm( void )
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void WB_TestStrm::PrepareWb( void )
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{
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{
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/*
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U32 trd=trdNo;
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U32 id, id_mod, ver;
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BRDC_fprintf( stderr, "\nПодготовка тетрады\n" );
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id = pBrd->RegPeekInd( trd, 0x100 );
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id_mod = pBrd->RegPeekInd( trd, 0x101 );
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ver = pBrd->RegPeekInd( trd, 0x102 );
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//pBrd->RegPokeInd( trd, 0, 0x2038 );
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BRDC_fprintf( stderr, "\nТетрада %d ID: 0x%.2X MOD: %d VER: %d.%d \n\n",
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BRDC_fprintf( stderr, "\nPrepare TEST_GENERATE\n" );
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trd, id, id_mod, (ver>>8) & 0xFF, ver&0xFF );
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//if( fnameDDS )
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// PrepareDDS();
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BlockMode = DataType <<8;
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BlockMode |= DataFix <<7;
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if( isMainTest )
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//if( isTestCtrl )
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PrepareMain();
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{
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pBrd->wb_block_write( 1, 9, 1 );
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pBrd->wb_block_write( 1, 9, BlockMode );
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BlockMode = DataType <<8;
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}
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BlockMode |= DataFix <<7;
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if( isTestCtrl )
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PrepareTestCtrl();
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if( isAdmReg )
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PrepareAdmReg( fnameAdmReg );
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IsviStatus=0;
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IsviStatus=0;
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IsviCnt=0;
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IsviCnt=0;
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isIsvi=0;
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isIsvi=0;
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if( fnameIsvi )
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if( fnameIsvi )
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{
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{
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IsviStatus=1;
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IsviStatus=1;
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isIsvi=1;
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isIsvi=1;
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}
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}
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*/
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}
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}
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