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URL https://opencores.org/ocsvn/pcie_ds_dma/pcie_ds_dma/trunk

Subversion Repositories pcie_ds_dma

[/] [pcie_ds_dma/] [trunk/] [soft/] [linux/] [driver/] [pexdrv/] [pexproc.c] - Diff between revs 6 and 33

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Rev 6 Rev 33
Line 31... Line 31...
 
 
//--------------------------------------------------------------------
//--------------------------------------------------------------------
 
 
int pex_show_capabilities( char *buf, struct pex_device *brd )
int pex_show_capabilities( char *buf, struct pex_device *brd )
{
{
    int i = 0, res = -1;
    int i = 0;
 
    int res = 0;
    char *p = buf;
    char *p = buf;
    u8 cap;
    u8 cap = 0;
    u8 cap_id;
    u32 cap_id = 0;
 
 
    p += sprintf(p,"\n" );
    p += sprintf(p,"\n" );
    p += sprintf(p,"  Device capabilities\n" );
 
    p += sprintf(p,"\n" );
 
 
 
    res = pci_read_config_byte(brd->m_pci, 0x34, &cap);
    res = pci_read_config_byte(brd->m_pci, 0x34, &cap);
    if(res < 0) {
    if(res < 0) {
        p += sprintf(p, "  Error read capabilities pointer\n");
        p += sprintf(p, "  Error read capabilities pointer\n");
        goto err_exit;
        goto err_exit;
    }
    }
 
 
    res = pci_read_config_byte(brd->m_pci, cap, &cap_id);
    p += sprintf(p, "  Capability pointer: 0x%x\n", cap);
    if(res < 0) {
 
        p += sprintf(p, "  Error read capabilities id\n");
 
        goto err_exit;
 
    }
 
 
 
    if(cap_id != 0x10) { //not PCI Express capabilities
    while(1) {
 
 
        res = pci_read_config_byte(brd->m_pci, cap+1, &cap);
        res = pci_read_config_dword(brd->m_pci, cap, &cap_id);
        if(res < 0) {
        if(res < 0) {
            p += sprintf(p, "  Error read capabilities id\n");
            p += sprintf(p, "  Error read capabilities id\n");
            goto err_exit;
            goto err_exit;
        }
        }
 
 
 
        p += sprintf(p, "  Capability ID: 0x%x\n", cap_id);
 
 
 
        if((cap_id & 0xff) == 0x10) {
 
            break;
    }
    }
 
 
    res = pci_read_config_byte(brd->m_pci, cap, &cap_id);
        cap = ((cap_id >> 8) & 0xff);
    if(res < 0) {
        if(!cap)
        p += sprintf(p, "  Error read capabilities id\n");
            break;
        goto err_exit;
 
    } else {
 
        p += sprintf(p, "  CAP_ID = 0x%X\n", cap_id);
 
    }
    }
 
 
    if(cap_id != 0x10) {
    if((cap_id & 0xff) != 0x10) {
        p += sprintf(p, "  Can't find PCI Express capabilities\n");
        p += sprintf(p, "  Can't find PCI Express capabilities\n");
        goto err_exit;
        goto err_exit;
    }
    }
 
 
 
    p += sprintf(p,"\n" );
 
    p += sprintf(p, "  PCI Express Capability Register Set\n");
 
    p += sprintf(p,"\n" );
 
 
    for(i=0; i<9; i++) {
    for(i=0; i<9; i++) {
        u32 reg = 0;
        u32 reg = 0;
        int j = cap + 4*i;
        int j = cap + 4*i;
        res = pci_read_config_dword(brd->m_pci, j, &reg);
        res = pci_read_config_dword(brd->m_pci, j, &reg);
        if(res < 0) {
        if(res < 0) {
            p += sprintf(p, "  Error read capabilities sructure: offset %x\n", j);
            p += sprintf(p, "  Error read capabilities sructure: offset %x\n", j);
            goto err_exit;
            goto err_exit;
        }
        }
        p += sprintf(p, "  %x: = 0x%X\n", j, reg);
        p += sprintf(p, "  0x%x:  0x%X\n", j, reg);
    }
    }
 
 
    err_exit:
    err_exit:
 
 
    return (p-buf);
    return (p-buf);

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