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https://opencores.org/ocsvn/pepelatz_misc/pepelatz_misc/trunk
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assign instruction0=command[5:1];
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assign instruction0=command[5:1];
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wire [4:0]instruction1;
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wire [4:0]instruction1;
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assign instruction1=command[11:6];
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assign instruction1=command[11:6];
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wire [4:0]instruction2;
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wire [4:0]instruction2;
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assign instruction2=command[15:12];
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assign instruction2=command[15:12];
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reg GetCommand;//if GetCommand=0, current command is not actual.
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reg GetCommand;//if GetCommand=0, current command is not actual!
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always@(posedge clk)//Main block
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always@(posedge clk)//Main block
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if (GetCommand==0) begin//Get command
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if (GetCommand==0) begin//Get command
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end else
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end else
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if (GetOperand==1) begin
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if (GetOperand==1) begin
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